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Searched refs:REG_CHIPID_CIDR (Results 1 – 8 of 8) sorted by relevance

/hal_atmel-3.6.0/asf/sam/include/sam4e/instance/
Dchipid.h35 #define REG_CHIPID_CIDR (0x400E0740U) /**< \brief (CHIPID) Chip ID Register */ macro
38 #define REG_CHIPID_CIDR (*(RoReg*)0x400E0740U) /**< \brief (CHIPID) Chip ID Register */ macro
/hal_atmel-3.6.0/asf/sam/include/sam4l/instance/
Dchipid.h34 #define REG_CHIPID_CIDR (0x400E0740) /**< \brief (CHIPID) Chip ID Register */ macro
37 #define REG_CHIPID_CIDR (*(RoReg *)0x400E0740UL) /**< \brief (CHIPID) Chip ID Register … macro
/hal_atmel-3.6.0/asf/sam/include/samv71/instance/
Dchipid.h37 #define REG_CHIPID_CIDR (0x400E0940) /**< (CHIPID) Chip ID Register */ macro
42 #define REG_CHIPID_CIDR (*(__I uint32_t*)0x400E0940U) /**< (CHIPID) Chip ID Register */ macro
/hal_atmel-3.6.0/asf/sam/include/samv71b/instance/
Dchipid.h37 #define REG_CHIPID_CIDR (0x400E0940) /**< (CHIPID) Chip ID Register */ macro
42 #define REG_CHIPID_CIDR (*(__I uint32_t*)0x400E0940U) /**< (CHIPID) Chip ID Register */ macro
/hal_atmel-3.6.0/asf/sam/include/sam4s/instance/
Dchipid.h35 #define REG_CHIPID_CIDR (0x400E0740U) /**< \brief (CHIPID) Chip ID Register */ macro
38 #define REG_CHIPID_CIDR (*(__I uint32_t*)0x400E0740U) /**< \brief (CHIPID) Chip ID Register */ macro
/hal_atmel-3.6.0/asf/sam/include/sam3x/instance/
Dchipid.h35 #define REG_CHIPID_CIDR (0x400E0940U) /**< \brief (CHIPID) Chip ID Register */ macro
38 #define REG_CHIPID_CIDR (*(__I uint32_t*)0x400E0940U) /**< \brief (CHIPID) Chip ID Register */ macro
/hal_atmel-3.6.0/asf/sam/include/same70b/instance/
Dchipid.h37 #define REG_CHIPID_CIDR (0x400E0940) /**< (CHIPID) Chip ID Register */ macro
42 #define REG_CHIPID_CIDR (*(__I uint32_t*)0x400E0940U) /**< (CHIPID) Chip ID Register */ macro
/hal_atmel-3.6.0/asf/sam/include/same70/instance/
Dchipid.h37 #define REG_CHIPID_CIDR (0x400E0940) /**< (CHIPID) Chip ID Register */ macro
42 #define REG_CHIPID_CIDR (*(__I uint32_t*)0x400E0940U) /**< (CHIPID) Chip ID Register */ macro