1 /*
2  * Autogenerated file
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 #include <dt-bindings/pinctrl/atmel_sam_pinctrl.h>
8 
9 /* pa0_gpio */
10 #define PA0_GPIO \
11 	SAM_PINMUX(a, 0, gpio, gpio)
12 
13 /* pa1_gpio */
14 #define PA1_GPIO \
15 	SAM_PINMUX(a, 1, gpio, gpio)
16 
17 /* pa2_gpio */
18 #define PA2_GPIO \
19 	SAM_PINMUX(a, 2, gpio, gpio)
20 
21 /* pa2a_scif_gclk0 */
22 #define PA2A_SCIF_GCLK0 \
23 	SAM_PINMUX(a, 2, a, periph)
24 
25 /* pa2b_spi_npcs0 */
26 #define PA2B_SPI_NPCS0 \
27 	SAM_PINMUX(a, 2, b, periph)
28 
29 /* pa2g_catb_dis */
30 #define PA2G_CATB_DIS \
31 	SAM_PINMUX(a, 2, g, periph)
32 
33 /* pa3_gpio */
34 #define PA3_GPIO \
35 	SAM_PINMUX(a, 3, gpio, gpio)
36 
37 /* pa3b_spi_miso */
38 #define PA3B_SPI_MISO \
39 	SAM_PINMUX(a, 3, b, periph)
40 
41 /* pa4_gpio */
42 #define PA4_GPIO \
43 	SAM_PINMUX(a, 4, gpio, gpio)
44 
45 /* pa4a_adcife_ad0 */
46 #define PA4A_ADCIFE_AD0 \
47 	SAM_PINMUX(a, 4, a, periph)
48 
49 /* pa4b_usart0_clk */
50 #define PA4B_USART0_CLK \
51 	SAM_PINMUX(a, 4, b, periph)
52 
53 /* pa4c_eic_extint2 */
54 #define PA4C_EIC_EXTINT2 \
55 	SAM_PINMUX(a, 4, c, periph)
56 
57 /* pa4d_gloc_in1 */
58 #define PA4D_GLOC_IN1 \
59 	SAM_PINMUX(a, 4, d, periph)
60 
61 /* pa4g_catb_sense0 */
62 #define PA4G_CATB_SENSE0 \
63 	SAM_PINMUX(a, 4, g, periph)
64 
65 /* pa5_gpio */
66 #define PA5_GPIO \
67 	SAM_PINMUX(a, 5, gpio, gpio)
68 
69 /* pa5a_adcife_ad1 */
70 #define PA5A_ADCIFE_AD1 \
71 	SAM_PINMUX(a, 5, a, periph)
72 
73 /* pa5b_usart0_rxd */
74 #define PA5B_USART0_RXD \
75 	SAM_PINMUX(a, 5, b, periph)
76 
77 /* pa5c_eic_extint3 */
78 #define PA5C_EIC_EXTINT3 \
79 	SAM_PINMUX(a, 5, c, periph)
80 
81 /* pa5d_gloc_in2 */
82 #define PA5D_GLOC_IN2 \
83 	SAM_PINMUX(a, 5, d, periph)
84 
85 /* pa5e_adcife_trigger */
86 #define PA5E_ADCIFE_TRIGGER \
87 	SAM_PINMUX(a, 5, e, periph)
88 
89 /* pa5g_catb_sense1 */
90 #define PA5G_CATB_SENSE1 \
91 	SAM_PINMUX(a, 5, g, periph)
92 
93 /* pa6_gpio */
94 #define PA6_GPIO \
95 	SAM_PINMUX(a, 6, gpio, gpio)
96 
97 /* pa6a_dacc_vout */
98 #define PA6A_DACC_VOUT \
99 	SAM_PINMUX(a, 6, a, periph)
100 
101 /* pa6b_usart0_rts */
102 #define PA6B_USART0_RTS \
103 	SAM_PINMUX(a, 6, b, periph)
104 
105 /* pa6c_eic_extint1 */
106 #define PA6C_EIC_EXTINT1 \
107 	SAM_PINMUX(a, 6, c, periph)
108 
109 /* pa6d_gloc_in0 */
110 #define PA6D_GLOC_IN0 \
111 	SAM_PINMUX(a, 6, d, periph)
112 
113 /* pa6e_acifc_acan0 */
114 #define PA6E_ACIFC_ACAN0 \
115 	SAM_PINMUX(a, 6, e, periph)
116 
117 /* pa6g_catb_sense2 */
118 #define PA6G_CATB_SENSE2 \
119 	SAM_PINMUX(a, 6, g, periph)
120 
121 /* pa7_gpio */
122 #define PA7_GPIO \
123 	SAM_PINMUX(a, 7, gpio, gpio)
124 
125 /* pa7a_adcife_ad2 */
126 #define PA7A_ADCIFE_AD2 \
127 	SAM_PINMUX(a, 7, a, periph)
128 
129 /* pa7b_usart0_txd */
130 #define PA7B_USART0_TXD \
131 	SAM_PINMUX(a, 7, b, periph)
132 
133 /* pa7c_eic_extint4 */
134 #define PA7C_EIC_EXTINT4 \
135 	SAM_PINMUX(a, 7, c, periph)
136 
137 /* pa7d_gloc_in3 */
138 #define PA7D_GLOC_IN3 \
139 	SAM_PINMUX(a, 7, d, periph)
140 
141 /* pa7e_acifc_acap0 */
142 #define PA7E_ACIFC_ACAP0 \
143 	SAM_PINMUX(a, 7, e, periph)
144 
145 /* pa7g_catb_sense3 */
146 #define PA7G_CATB_SENSE3 \
147 	SAM_PINMUX(a, 7, g, periph)
148 
149 /* pa8_gpio */
150 #define PA8_GPIO \
151 	SAM_PINMUX(a, 8, gpio, gpio)
152 
153 /* pa8a_usart0_rts */
154 #define PA8A_USART0_RTS \
155 	SAM_PINMUX(a, 8, a, periph)
156 
157 /* pa8b_tc0_a0 */
158 #define PA8B_TC0_A0 \
159 	SAM_PINMUX(a, 8, b, periph)
160 
161 /* pa8c_pevc_evt0 */
162 #define PA8C_PEVC_EVT0 \
163 	SAM_PINMUX(a, 8, c, periph)
164 
165 /* pa8d_gloc_out0 */
166 #define PA8D_GLOC_OUT0 \
167 	SAM_PINMUX(a, 8, d, periph)
168 
169 /* pa8f_lcdca_seg23 */
170 #define PA8F_LCDCA_SEG23 \
171 	SAM_PINMUX(a, 8, f, periph)
172 
173 /* pa8g_catb_sense4 */
174 #define PA8G_CATB_SENSE4 \
175 	SAM_PINMUX(a, 8, g, periph)
176 
177 /* pa9_gpio */
178 #define PA9_GPIO \
179 	SAM_PINMUX(a, 9, gpio, gpio)
180 
181 /* pa9a_usart0_cts */
182 #define PA9A_USART0_CTS \
183 	SAM_PINMUX(a, 9, a, periph)
184 
185 /* pa9b_tc0_b0 */
186 #define PA9B_TC0_B0 \
187 	SAM_PINMUX(a, 9, b, periph)
188 
189 /* pa9c_pevc_evt1 */
190 #define PA9C_PEVC_EVT1 \
191 	SAM_PINMUX(a, 9, c, periph)
192 
193 /* pa9d_parc_pcdata0 */
194 #define PA9D_PARC_PCDATA0 \
195 	SAM_PINMUX(a, 9, d, periph)
196 
197 /* pa9f_lcdca_com3 */
198 #define PA9F_LCDCA_COM3 \
199 	SAM_PINMUX(a, 9, f, periph)
200 
201 /* pa9g_catb_sense5 */
202 #define PA9G_CATB_SENSE5 \
203 	SAM_PINMUX(a, 9, g, periph)
204 
205 /* pa10_gpio */
206 #define PA10_GPIO \
207 	SAM_PINMUX(a, 10, gpio, gpio)
208 
209 /* pa10a_usart0_clk */
210 #define PA10A_USART0_CLK \
211 	SAM_PINMUX(a, 10, a, periph)
212 
213 /* pa10b_tc0_a1 */
214 #define PA10B_TC0_A1 \
215 	SAM_PINMUX(a, 10, b, periph)
216 
217 /* pa10c_pevc_evt2 */
218 #define PA10C_PEVC_EVT2 \
219 	SAM_PINMUX(a, 10, c, periph)
220 
221 /* pa10d_parc_pcdata1 */
222 #define PA10D_PARC_PCDATA1 \
223 	SAM_PINMUX(a, 10, d, periph)
224 
225 /* pa10f_lcdca_com2 */
226 #define PA10F_LCDCA_COM2 \
227 	SAM_PINMUX(a, 10, f, periph)
228 
229 /* pa10g_catb_sense6 */
230 #define PA10G_CATB_SENSE6 \
231 	SAM_PINMUX(a, 10, g, periph)
232 
233 /* pa11_gpio */
234 #define PA11_GPIO \
235 	SAM_PINMUX(a, 11, gpio, gpio)
236 
237 /* pa11a_usart0_rxd */
238 #define PA11A_USART0_RXD \
239 	SAM_PINMUX(a, 11, a, periph)
240 
241 /* pa11b_tc0_b1 */
242 #define PA11B_TC0_B1 \
243 	SAM_PINMUX(a, 11, b, periph)
244 
245 /* pa11c_pevc_evt3 */
246 #define PA11C_PEVC_EVT3 \
247 	SAM_PINMUX(a, 11, c, periph)
248 
249 /* pa11d_parc_pcdata2 */
250 #define PA11D_PARC_PCDATA2 \
251 	SAM_PINMUX(a, 11, d, periph)
252 
253 /* pa11f_lcdca_com1 */
254 #define PA11F_LCDCA_COM1 \
255 	SAM_PINMUX(a, 11, f, periph)
256 
257 /* pa11g_catb_sense7 */
258 #define PA11G_CATB_SENSE7 \
259 	SAM_PINMUX(a, 11, g, periph)
260 
261 /* pa12_gpio */
262 #define PA12_GPIO \
263 	SAM_PINMUX(a, 12, gpio, gpio)
264 
265 /* pa12a_usart0_txd */
266 #define PA12A_USART0_TXD \
267 	SAM_PINMUX(a, 12, a, periph)
268 
269 /* pa12b_tc0_a2 */
270 #define PA12B_TC0_A2 \
271 	SAM_PINMUX(a, 12, b, periph)
272 
273 /* pa12d_parc_pcdata3 */
274 #define PA12D_PARC_PCDATA3 \
275 	SAM_PINMUX(a, 12, d, periph)
276 
277 /* pa12f_lcdca_com0 */
278 #define PA12F_LCDCA_COM0 \
279 	SAM_PINMUX(a, 12, f, periph)
280 
281 /* pa12g_catb_dis */
282 #define PA12G_CATB_DIS \
283 	SAM_PINMUX(a, 12, g, periph)
284 
285 /* pa13_gpio */
286 #define PA13_GPIO \
287 	SAM_PINMUX(a, 13, gpio, gpio)
288 
289 /* pa13a_usart1_rts */
290 #define PA13A_USART1_RTS \
291 	SAM_PINMUX(a, 13, a, periph)
292 
293 /* pa13b_tc0_b2 */
294 #define PA13B_TC0_B2 \
295 	SAM_PINMUX(a, 13, b, periph)
296 
297 /* pa13c_spi_npcs1 */
298 #define PA13C_SPI_NPCS1 \
299 	SAM_PINMUX(a, 13, c, periph)
300 
301 /* pa13d_parc_pcdata4 */
302 #define PA13D_PARC_PCDATA4 \
303 	SAM_PINMUX(a, 13, d, periph)
304 
305 /* pa13f_lcdca_seg5 */
306 #define PA13F_LCDCA_SEG5 \
307 	SAM_PINMUX(a, 13, f, periph)
308 
309 /* pa13g_catb_sense8 */
310 #define PA13G_CATB_SENSE8 \
311 	SAM_PINMUX(a, 13, g, periph)
312 
313 /* pa14_gpio */
314 #define PA14_GPIO \
315 	SAM_PINMUX(a, 14, gpio, gpio)
316 
317 /* pa14a_usart1_clk */
318 #define PA14A_USART1_CLK \
319 	SAM_PINMUX(a, 14, a, periph)
320 
321 /* pa14b_tc0_clk0 */
322 #define PA14B_TC0_CLK0 \
323 	SAM_PINMUX(a, 14, b, periph)
324 
325 /* pa14c_spi_npcs2 */
326 #define PA14C_SPI_NPCS2 \
327 	SAM_PINMUX(a, 14, c, periph)
328 
329 /* pa14d_parc_pcdata5 */
330 #define PA14D_PARC_PCDATA5 \
331 	SAM_PINMUX(a, 14, d, periph)
332 
333 /* pa14f_lcdca_seg6 */
334 #define PA14F_LCDCA_SEG6 \
335 	SAM_PINMUX(a, 14, f, periph)
336 
337 /* pa14g_catb_sense9 */
338 #define PA14G_CATB_SENSE9 \
339 	SAM_PINMUX(a, 14, g, periph)
340 
341 /* pa15_gpio */
342 #define PA15_GPIO \
343 	SAM_PINMUX(a, 15, gpio, gpio)
344 
345 /* pa15a_usart1_rxd */
346 #define PA15A_USART1_RXD \
347 	SAM_PINMUX(a, 15, a, periph)
348 
349 /* pa15b_tc0_clk1 */
350 #define PA15B_TC0_CLK1 \
351 	SAM_PINMUX(a, 15, b, periph)
352 
353 /* pa15c_spi_npcs3 */
354 #define PA15C_SPI_NPCS3 \
355 	SAM_PINMUX(a, 15, c, periph)
356 
357 /* pa15d_parc_pcdata6 */
358 #define PA15D_PARC_PCDATA6 \
359 	SAM_PINMUX(a, 15, d, periph)
360 
361 /* pa15f_lcdca_seg7 */
362 #define PA15F_LCDCA_SEG7 \
363 	SAM_PINMUX(a, 15, f, periph)
364 
365 /* pa15g_catb_sense10 */
366 #define PA15G_CATB_SENSE10 \
367 	SAM_PINMUX(a, 15, g, periph)
368 
369 /* pa16_gpio */
370 #define PA16_GPIO \
371 	SAM_PINMUX(a, 16, gpio, gpio)
372 
373 /* pa16a_usart1_txd */
374 #define PA16A_USART1_TXD \
375 	SAM_PINMUX(a, 16, a, periph)
376 
377 /* pa16b_tc0_clk2 */
378 #define PA16B_TC0_CLK2 \
379 	SAM_PINMUX(a, 16, b, periph)
380 
381 /* pa16c_eic_extint1 */
382 #define PA16C_EIC_EXTINT1 \
383 	SAM_PINMUX(a, 16, c, periph)
384 
385 /* pa16d_parc_pcdata7 */
386 #define PA16D_PARC_PCDATA7 \
387 	SAM_PINMUX(a, 16, d, periph)
388 
389 /* pa16f_lcdca_seg8 */
390 #define PA16F_LCDCA_SEG8 \
391 	SAM_PINMUX(a, 16, f, periph)
392 
393 /* pa16g_catb_sense11 */
394 #define PA16G_CATB_SENSE11 \
395 	SAM_PINMUX(a, 16, g, periph)
396 
397 /* pa17_gpio */
398 #define PA17_GPIO \
399 	SAM_PINMUX(a, 17, gpio, gpio)
400 
401 /* pa17a_usart2_rts */
402 #define PA17A_USART2_RTS \
403 	SAM_PINMUX(a, 17, a, periph)
404 
405 /* pa17b_abdacb_dac0 */
406 #define PA17B_ABDACB_DAC0 \
407 	SAM_PINMUX(a, 17, b, periph)
408 
409 /* pa17c_eic_extint2 */
410 #define PA17C_EIC_EXTINT2 \
411 	SAM_PINMUX(a, 17, c, periph)
412 
413 /* pa17d_parc_pcck */
414 #define PA17D_PARC_PCCK \
415 	SAM_PINMUX(a, 17, d, periph)
416 
417 /* pa17f_lcdca_seg9 */
418 #define PA17F_LCDCA_SEG9 \
419 	SAM_PINMUX(a, 17, f, periph)
420 
421 /* pa17g_catb_sense12 */
422 #define PA17G_CATB_SENSE12 \
423 	SAM_PINMUX(a, 17, g, periph)
424 
425 /* pa18_gpio */
426 #define PA18_GPIO \
427 	SAM_PINMUX(a, 18, gpio, gpio)
428 
429 /* pa18a_usart2_clk */
430 #define PA18A_USART2_CLK \
431 	SAM_PINMUX(a, 18, a, periph)
432 
433 /* pa18b_abdacb_dacn0 */
434 #define PA18B_ABDACB_DACN0 \
435 	SAM_PINMUX(a, 18, b, periph)
436 
437 /* pa18c_eic_extint3 */
438 #define PA18C_EIC_EXTINT3 \
439 	SAM_PINMUX(a, 18, c, periph)
440 
441 /* pa18d_parc_pcen1 */
442 #define PA18D_PARC_PCEN1 \
443 	SAM_PINMUX(a, 18, d, periph)
444 
445 /* pa18f_lcdca_seg18 */
446 #define PA18F_LCDCA_SEG18 \
447 	SAM_PINMUX(a, 18, f, periph)
448 
449 /* pa18g_catb_sense13 */
450 #define PA18G_CATB_SENSE13 \
451 	SAM_PINMUX(a, 18, g, periph)
452 
453 /* pa19_gpio */
454 #define PA19_GPIO \
455 	SAM_PINMUX(a, 19, gpio, gpio)
456 
457 /* pa19a_usart2_rxd */
458 #define PA19A_USART2_RXD \
459 	SAM_PINMUX(a, 19, a, periph)
460 
461 /* pa19b_abdacb_dac1 */
462 #define PA19B_ABDACB_DAC1 \
463 	SAM_PINMUX(a, 19, b, periph)
464 
465 /* pa19c_eic_extint4 */
466 #define PA19C_EIC_EXTINT4 \
467 	SAM_PINMUX(a, 19, c, periph)
468 
469 /* pa19d_parc_pcen2 */
470 #define PA19D_PARC_PCEN2 \
471 	SAM_PINMUX(a, 19, d, periph)
472 
473 /* pa19e_scif_gclk0 */
474 #define PA19E_SCIF_GCLK0 \
475 	SAM_PINMUX(a, 19, e, periph)
476 
477 /* pa19f_lcdca_seg19 */
478 #define PA19F_LCDCA_SEG19 \
479 	SAM_PINMUX(a, 19, f, periph)
480 
481 /* pa19g_catb_sense14 */
482 #define PA19G_CATB_SENSE14 \
483 	SAM_PINMUX(a, 19, g, periph)
484 
485 /* pa20_gpio */
486 #define PA20_GPIO \
487 	SAM_PINMUX(a, 20, gpio, gpio)
488 
489 /* pa20a_usart2_txd */
490 #define PA20A_USART2_TXD \
491 	SAM_PINMUX(a, 20, a, periph)
492 
493 /* pa20b_abdacb_dacn1 */
494 #define PA20B_ABDACB_DACN1 \
495 	SAM_PINMUX(a, 20, b, periph)
496 
497 /* pa20c_eic_extint5 */
498 #define PA20C_EIC_EXTINT5 \
499 	SAM_PINMUX(a, 20, c, periph)
500 
501 /* pa20d_gcloc_in0 */
502 #define PA20D_GCLOC_IN0 \
503 	SAM_PINMUX(a, 20, d, periph)
504 
505 /* pa20e_scif_gclk1 */
506 #define PA20E_SCIF_GCLK1 \
507 	SAM_PINMUX(a, 20, e, periph)
508 
509 /* pa20f_lcdca_seg20 */
510 #define PA20F_LCDCA_SEG20 \
511 	SAM_PINMUX(a, 20, f, periph)
512 
513 /* pa20g_catb_sense15 */
514 #define PA20G_CATB_SENSE15 \
515 	SAM_PINMUX(a, 20, g, periph)
516 
517 /* pa21_gpio */
518 #define PA21_GPIO \
519 	SAM_PINMUX(a, 21, gpio, gpio)
520 
521 /* pa21a_spi_miso */
522 #define PA21A_SPI_MISO \
523 	SAM_PINMUX(a, 21, a, periph)
524 
525 /* pa21b_usart1_cts */
526 #define PA21B_USART1_CTS \
527 	SAM_PINMUX(a, 21, b, periph)
528 
529 /* pa21c_eic_extint6 */
530 #define PA21C_EIC_EXTINT6 \
531 	SAM_PINMUX(a, 21, c, periph)
532 
533 /* pa21d_gcloc_in1 */
534 #define PA21D_GCLOC_IN1 \
535 	SAM_PINMUX(a, 21, d, periph)
536 
537 /* pa21e_twim2_twd */
538 #define PA21E_TWIM2_TWD \
539 	SAM_PINMUX(a, 21, e, periph)
540 
541 /* pa21f_lcdca_seg34 */
542 #define PA21F_LCDCA_SEG34 \
543 	SAM_PINMUX(a, 21, f, periph)
544 
545 /* pa21g_catb_sense16 */
546 #define PA21G_CATB_SENSE16 \
547 	SAM_PINMUX(a, 21, g, periph)
548 
549 /* pa22_gpio */
550 #define PA22_GPIO \
551 	SAM_PINMUX(a, 22, gpio, gpio)
552 
553 /* pa22a_spi_mosi */
554 #define PA22A_SPI_MOSI \
555 	SAM_PINMUX(a, 22, a, periph)
556 
557 /* pa22b_usart2_cts */
558 #define PA22B_USART2_CTS \
559 	SAM_PINMUX(a, 22, b, periph)
560 
561 /* pa22c_eic_extint7 */
562 #define PA22C_EIC_EXTINT7 \
563 	SAM_PINMUX(a, 22, c, periph)
564 
565 /* pa22d_gcloc_in2 */
566 #define PA22D_GCLOC_IN2 \
567 	SAM_PINMUX(a, 22, d, periph)
568 
569 /* pa22e_twim2_twck */
570 #define PA22E_TWIM2_TWCK \
571 	SAM_PINMUX(a, 22, e, periph)
572 
573 /* pa22f_lcdca_seg35 */
574 #define PA22F_LCDCA_SEG35 \
575 	SAM_PINMUX(a, 22, f, periph)
576 
577 /* pa22g_catb_sense17 */
578 #define PA22G_CATB_SENSE17 \
579 	SAM_PINMUX(a, 22, g, periph)
580 
581 /* pa23_gpio */
582 #define PA23_GPIO \
583 	SAM_PINMUX(a, 23, gpio, gpio)
584 
585 /* pa23a_spi_sck */
586 #define PA23A_SPI_SCK \
587 	SAM_PINMUX(a, 23, a, periph)
588 
589 /* pa23b_twims0_twd */
590 #define PA23B_TWIMS0_TWD \
591 	SAM_PINMUX(a, 23, b, periph)
592 
593 /* pa23c_eic_extint8 */
594 #define PA23C_EIC_EXTINT8 \
595 	SAM_PINMUX(a, 23, c, periph)
596 
597 /* pa23d_gcloc_in3 */
598 #define PA23D_GCLOC_IN3 \
599 	SAM_PINMUX(a, 23, d, periph)
600 
601 /* pa23e_scif_glck_in0 */
602 #define PA23E_SCIF_GLCK_IN0 \
603 	SAM_PINMUX(a, 23, e, periph)
604 
605 /* pa23f_lcdca_seg38 */
606 #define PA23F_LCDCA_SEG38 \
607 	SAM_PINMUX(a, 23, f, periph)
608 
609 /* pa23g_catb_dis */
610 #define PA23G_CATB_DIS \
611 	SAM_PINMUX(a, 23, g, periph)
612 
613 /* pa24_gpio */
614 #define PA24_GPIO \
615 	SAM_PINMUX(a, 24, gpio, gpio)
616 
617 /* pa24a_spi_npcs0 */
618 #define PA24A_SPI_NPCS0 \
619 	SAM_PINMUX(a, 24, a, periph)
620 
621 /* pa24b_twims0_twck */
622 #define PA24B_TWIMS0_TWCK \
623 	SAM_PINMUX(a, 24, b, periph)
624 
625 /* pa24d_gcloc_out0 */
626 #define PA24D_GCLOC_OUT0 \
627 	SAM_PINMUX(a, 24, d, periph)
628 
629 /* pa24e_scif_glck_in1 */
630 #define PA24E_SCIF_GLCK_IN1 \
631 	SAM_PINMUX(a, 24, e, periph)
632 
633 /* pa24f_lcdca_seg39 */
634 #define PA24F_LCDCA_SEG39 \
635 	SAM_PINMUX(a, 24, f, periph)
636 
637 /* pa24g_catb_sense18 */
638 #define PA24G_CATB_SENSE18 \
639 	SAM_PINMUX(a, 24, g, periph)
640 
641 /* pa25_gpio */
642 #define PA25_GPIO \
643 	SAM_PINMUX(a, 25, gpio, gpio)
644 
645 /* pa25a_usbc_dm */
646 #define PA25A_USBC_DM \
647 	SAM_PINMUX(a, 25, a, periph)
648 
649 /* pa25b_usart2_rxd */
650 #define PA25B_USART2_RXD \
651 	SAM_PINMUX(a, 25, b, periph)
652 
653 /* pa25g_catb_sense19 */
654 #define PA25G_CATB_SENSE19 \
655 	SAM_PINMUX(a, 25, g, periph)
656 
657 /* pa26_gpio */
658 #define PA26_GPIO \
659 	SAM_PINMUX(a, 26, gpio, gpio)
660 
661 /* pa26a_usbc_dp */
662 #define PA26A_USBC_DP \
663 	SAM_PINMUX(a, 26, a, periph)
664 
665 /* pa26b_usart2_txd */
666 #define PA26B_USART2_TXD \
667 	SAM_PINMUX(a, 26, b, periph)
668 
669 /* pa26g_catb_sense20 */
670 #define PA26G_CATB_SENSE20 \
671 	SAM_PINMUX(a, 26, g, periph)
672 
673 /* pa27_gpio */
674 #define PA27_GPIO \
675 	SAM_PINMUX(a, 27, gpio, gpio)
676 
677 /* pa28_gpio */
678 #define PA28_GPIO \
679 	SAM_PINMUX(a, 28, gpio, gpio)
680 
681 /* pa29_gpio */
682 #define PA29_GPIO \
683 	SAM_PINMUX(a, 29, gpio, gpio)
684 
685 /* pa30_gpio */
686 #define PA30_GPIO \
687 	SAM_PINMUX(a, 30, gpio, gpio)
688 
689 /* pa31_gpio */
690 #define PA31_GPIO \
691 	SAM_PINMUX(a, 31, gpio, gpio)
692 
693 /* pb0_gpio */
694 #define PB0_GPIO \
695 	SAM_PINMUX(b, 0, gpio, gpio)
696 
697 /* pb0a_twims1_twd */
698 #define PB0A_TWIMS1_TWD \
699 	SAM_PINMUX(b, 0, a, periph)
700 
701 /* pb0b_usart0_rxd */
702 #define PB0B_USART0_RXD \
703 	SAM_PINMUX(b, 0, b, periph)
704 
705 /* pb0g_catb_sense21 */
706 #define PB0G_CATB_SENSE21 \
707 	SAM_PINMUX(b, 0, g, periph)
708 
709 /* pb1_gpio */
710 #define PB1_GPIO \
711 	SAM_PINMUX(b, 1, gpio, gpio)
712 
713 /* pb1a_twims1_twck */
714 #define PB1A_TWIMS1_TWCK \
715 	SAM_PINMUX(b, 1, a, periph)
716 
717 /* pb1b_usart0_txd */
718 #define PB1B_USART0_TXD \
719 	SAM_PINMUX(b, 1, b, periph)
720 
721 /* pb1c_eic_extint0 */
722 #define PB1C_EIC_EXTINT0 \
723 	SAM_PINMUX(b, 1, c, periph)
724 
725 /* pb1g_catb_sense22 */
726 #define PB1G_CATB_SENSE22 \
727 	SAM_PINMUX(b, 1, g, periph)
728 
729 /* pb2_gpio */
730 #define PB2_GPIO \
731 	SAM_PINMUX(b, 2, gpio, gpio)
732 
733 /* pb2a_adcife_ad3 */
734 #define PB2A_ADCIFE_AD3 \
735 	SAM_PINMUX(b, 2, a, periph)
736 
737 /* pb2b_usart1_rts */
738 #define PB2B_USART1_RTS \
739 	SAM_PINMUX(b, 2, b, periph)
740 
741 /* pb2c_abdacb_dac0 */
742 #define PB2C_ABDACB_DAC0 \
743 	SAM_PINMUX(b, 2, c, periph)
744 
745 /* pb2d_iisc_isck */
746 #define PB2D_IISC_ISCK \
747 	SAM_PINMUX(b, 2, d, periph)
748 
749 /* pb2e_acifc_acbn0 */
750 #define PB2E_ACIFC_ACBN0 \
751 	SAM_PINMUX(b, 2, e, periph)
752 
753 /* pb2g_catb_sense23 */
754 #define PB2G_CATB_SENSE23 \
755 	SAM_PINMUX(b, 2, g, periph)
756 
757 /* pb3_gpio */
758 #define PB3_GPIO \
759 	SAM_PINMUX(b, 3, gpio, gpio)
760 
761 /* pb3a_adcife_ad4 */
762 #define PB3A_ADCIFE_AD4 \
763 	SAM_PINMUX(b, 3, a, periph)
764 
765 /* pb3b_usart1_clk */
766 #define PB3B_USART1_CLK \
767 	SAM_PINMUX(b, 3, b, periph)
768 
769 /* pb3c_abdacb_dacn0 */
770 #define PB3C_ABDACB_DACN0 \
771 	SAM_PINMUX(b, 3, c, periph)
772 
773 /* pb3d_iisc_isdi */
774 #define PB3D_IISC_ISDI \
775 	SAM_PINMUX(b, 3, d, periph)
776 
777 /* pb3e_acifc_acbp0 */
778 #define PB3E_ACIFC_ACBP0 \
779 	SAM_PINMUX(b, 3, e, periph)
780 
781 /* pb3g_catb_dis */
782 #define PB3G_CATB_DIS \
783 	SAM_PINMUX(b, 3, g, periph)
784 
785 /* pb4_gpio */
786 #define PB4_GPIO \
787 	SAM_PINMUX(b, 4, gpio, gpio)
788 
789 /* pb4a_adcife_ad5 */
790 #define PB4A_ADCIFE_AD5 \
791 	SAM_PINMUX(b, 4, a, periph)
792 
793 /* pb4b_usart1_rxd */
794 #define PB4B_USART1_RXD \
795 	SAM_PINMUX(b, 4, b, periph)
796 
797 /* pb4c_abdacb_dac1 */
798 #define PB4C_ABDACB_DAC1 \
799 	SAM_PINMUX(b, 4, c, periph)
800 
801 /* pb4d_iisc_isdo */
802 #define PB4D_IISC_ISDO \
803 	SAM_PINMUX(b, 4, d, periph)
804 
805 /* pb4e_dacc_ext_trig0 */
806 #define PB4E_DACC_EXT_TRIG0 \
807 	SAM_PINMUX(b, 4, e, periph)
808 
809 /* pb4g_catb_sense24 */
810 #define PB4G_CATB_SENSE24 \
811 	SAM_PINMUX(b, 4, g, periph)
812 
813 /* pb5_gpio */
814 #define PB5_GPIO \
815 	SAM_PINMUX(b, 5, gpio, gpio)
816 
817 /* pb5a_adcife_ad6 */
818 #define PB5A_ADCIFE_AD6 \
819 	SAM_PINMUX(b, 5, a, periph)
820 
821 /* pb5b_usart1_txd */
822 #define PB5B_USART1_TXD \
823 	SAM_PINMUX(b, 5, b, periph)
824 
825 /* pb5c_abdacb_dacn1 */
826 #define PB5C_ABDACB_DACN1 \
827 	SAM_PINMUX(b, 5, c, periph)
828 
829 /* pb5d_iisc_imck */
830 #define PB5D_IISC_IMCK \
831 	SAM_PINMUX(b, 5, d, periph)
832 
833 /* pb5g_catb_sense25 */
834 #define PB5G_CATB_SENSE25 \
835 	SAM_PINMUX(b, 5, g, periph)
836 
837 /* pb6_gpio */
838 #define PB6_GPIO \
839 	SAM_PINMUX(b, 6, gpio, gpio)
840 
841 /* pb6a_usart3_rts */
842 #define PB6A_USART3_RTS \
843 	SAM_PINMUX(b, 6, a, periph)
844 
845 /* pb6c_gloc_in4 */
846 #define PB6C_GLOC_IN4 \
847 	SAM_PINMUX(b, 6, c, periph)
848 
849 /* pb6d_iisc_iws */
850 #define PB6D_IISC_IWS \
851 	SAM_PINMUX(b, 6, d, periph)
852 
853 /* pb6f_lcdca_seg22 */
854 #define PB6F_LCDCA_SEG22 \
855 	SAM_PINMUX(b, 6, f, periph)
856 
857 /* pb6g_catb_sense26 */
858 #define PB6G_CATB_SENSE26 \
859 	SAM_PINMUX(b, 6, g, periph)
860 
861 /* pb7_gpio */
862 #define PB7_GPIO \
863 	SAM_PINMUX(b, 7, gpio, gpio)
864 
865 /* pb7a_usart3_cts */
866 #define PB7A_USART3_CTS \
867 	SAM_PINMUX(b, 7, a, periph)
868 
869 /* pb7c_gloc_in5 */
870 #define PB7C_GLOC_IN5 \
871 	SAM_PINMUX(b, 7, c, periph)
872 
873 /* pb7d_tc0_a0 */
874 #define PB7D_TC0_A0 \
875 	SAM_PINMUX(b, 7, d, periph)
876 
877 /* pb7f_lcdca_seg21 */
878 #define PB7F_LCDCA_SEG21 \
879 	SAM_PINMUX(b, 7, f, periph)
880 
881 /* pb7g_catb_sense27 */
882 #define PB7G_CATB_SENSE27 \
883 	SAM_PINMUX(b, 7, g, periph)
884 
885 /* pb8_gpio */
886 #define PB8_GPIO \
887 	SAM_PINMUX(b, 8, gpio, gpio)
888 
889 /* pb8a_usart3_clk */
890 #define PB8A_USART3_CLK \
891 	SAM_PINMUX(b, 8, a, periph)
892 
893 /* pb8c_gloc_in6 */
894 #define PB8C_GLOC_IN6 \
895 	SAM_PINMUX(b, 8, c, periph)
896 
897 /* pb8d_tc0_b0 */
898 #define PB8D_TC0_B0 \
899 	SAM_PINMUX(b, 8, d, periph)
900 
901 /* pb8f_lcdca_seg14 */
902 #define PB8F_LCDCA_SEG14 \
903 	SAM_PINMUX(b, 8, f, periph)
904 
905 /* pb8g_catb_sense28 */
906 #define PB8G_CATB_SENSE28 \
907 	SAM_PINMUX(b, 8, g, periph)
908 
909 /* pb9_gpio */
910 #define PB9_GPIO \
911 	SAM_PINMUX(b, 9, gpio, gpio)
912 
913 /* pb9a_usart3_rxd */
914 #define PB9A_USART3_RXD \
915 	SAM_PINMUX(b, 9, a, periph)
916 
917 /* pb9b_pevd_evt2 */
918 #define PB9B_PEVD_EVT2 \
919 	SAM_PINMUX(b, 9, b, periph)
920 
921 /* pb9c_gloc_in7 */
922 #define PB9C_GLOC_IN7 \
923 	SAM_PINMUX(b, 9, c, periph)
924 
925 /* pb9d_tc0_a1 */
926 #define PB9D_TC0_A1 \
927 	SAM_PINMUX(b, 9, d, periph)
928 
929 /* pb9f_lcdca_seg15 */
930 #define PB9F_LCDCA_SEG15 \
931 	SAM_PINMUX(b, 9, f, periph)
932 
933 /* pb9g_catb_sense29 */
934 #define PB9G_CATB_SENSE29 \
935 	SAM_PINMUX(b, 9, g, periph)
936 
937 /* pb10_gpio */
938 #define PB10_GPIO \
939 	SAM_PINMUX(b, 10, gpio, gpio)
940 
941 /* pb10a_usart3_txd */
942 #define PB10A_USART3_TXD \
943 	SAM_PINMUX(b, 10, a, periph)
944 
945 /* pb10b_pevd_evt3 */
946 #define PB10B_PEVD_EVT3 \
947 	SAM_PINMUX(b, 10, b, periph)
948 
949 /* pb10c_gloc_out1 */
950 #define PB10C_GLOC_OUT1 \
951 	SAM_PINMUX(b, 10, c, periph)
952 
953 /* pb10d_tc0_b1 */
954 #define PB10D_TC0_B1 \
955 	SAM_PINMUX(b, 10, d, periph)
956 
957 /* pb10e_scif_gclk0 */
958 #define PB10E_SCIF_GCLK0 \
959 	SAM_PINMUX(b, 10, e, periph)
960 
961 /* pb10f_lcdca_seg16 */
962 #define PB10F_LCDCA_SEG16 \
963 	SAM_PINMUX(b, 10, f, periph)
964 
965 /* pb10g_catb_sense30 */
966 #define PB10G_CATB_SENSE30 \
967 	SAM_PINMUX(b, 10, g, periph)
968 
969 /* pb11_gpio */
970 #define PB11_GPIO \
971 	SAM_PINMUX(b, 11, gpio, gpio)
972 
973 /* pb11a_usart0_cts */
974 #define PB11A_USART0_CTS \
975 	SAM_PINMUX(b, 11, a, periph)
976 
977 /* pb11b_spi_npcs2 */
978 #define PB11B_SPI_NPCS2 \
979 	SAM_PINMUX(b, 11, b, periph)
980 
981 /* pb11d_tc0_a2 */
982 #define PB11D_TC0_A2 \
983 	SAM_PINMUX(b, 11, d, periph)
984 
985 /* pb11e_scif_gclk1 */
986 #define PB11E_SCIF_GCLK1 \
987 	SAM_PINMUX(b, 11, e, periph)
988 
989 /* pb11f_lcdca_seg17 */
990 #define PB11F_LCDCA_SEG17 \
991 	SAM_PINMUX(b, 11, f, periph)
992 
993 /* pb11g_catb_sense31 */
994 #define PB11G_CATB_SENSE31 \
995 	SAM_PINMUX(b, 11, g, periph)
996 
997 /* pb12_gpio */
998 #define PB12_GPIO \
999 	SAM_PINMUX(b, 12, gpio, gpio)
1000 
1001 /* pb12a_usart0_rts */
1002 #define PB12A_USART0_RTS \
1003 	SAM_PINMUX(b, 12, a, periph)
1004 
1005 /* pb12b_spi_npcs3 */
1006 #define PB12B_SPI_NPCS3 \
1007 	SAM_PINMUX(b, 12, b, periph)
1008 
1009 /* pb12c_pevc_evt0 */
1010 #define PB12C_PEVC_EVT0 \
1011 	SAM_PINMUX(b, 12, c, periph)
1012 
1013 /* pb12d_tc0_b2 */
1014 #define PB12D_TC0_B2 \
1015 	SAM_PINMUX(b, 12, d, periph)
1016 
1017 /* pb12e_scif_gclk2 */
1018 #define PB12E_SCIF_GCLK2 \
1019 	SAM_PINMUX(b, 12, e, periph)
1020 
1021 /* pb12f_lcdca_seg32 */
1022 #define PB12F_LCDCA_SEG32 \
1023 	SAM_PINMUX(b, 12, f, periph)
1024 
1025 /* pb12g_catb_dis */
1026 #define PB12G_CATB_DIS \
1027 	SAM_PINMUX(b, 12, g, periph)
1028 
1029 /* pb13_gpio */
1030 #define PB13_GPIO \
1031 	SAM_PINMUX(b, 13, gpio, gpio)
1032 
1033 /* pb13a_usart0_clk */
1034 #define PB13A_USART0_CLK \
1035 	SAM_PINMUX(b, 13, a, periph)
1036 
1037 /* pb13b_spi_npcs1 */
1038 #define PB13B_SPI_NPCS1 \
1039 	SAM_PINMUX(b, 13, b, periph)
1040 
1041 /* pb13c_pevc_evt1 */
1042 #define PB13C_PEVC_EVT1 \
1043 	SAM_PINMUX(b, 13, c, periph)
1044 
1045 /* pb13d_tc0_clk0 */
1046 #define PB13D_TC0_CLK0 \
1047 	SAM_PINMUX(b, 13, d, periph)
1048 
1049 /* pb13e_scif_gclk3 */
1050 #define PB13E_SCIF_GCLK3 \
1051 	SAM_PINMUX(b, 13, e, periph)
1052 
1053 /* pb13f_lcdca_seg33 */
1054 #define PB13F_LCDCA_SEG33 \
1055 	SAM_PINMUX(b, 13, f, periph)
1056 
1057 /* pb13g_catb_sense0 */
1058 #define PB13G_CATB_SENSE0 \
1059 	SAM_PINMUX(b, 13, g, periph)
1060 
1061 /* pb14_gpio */
1062 #define PB14_GPIO \
1063 	SAM_PINMUX(b, 14, gpio, gpio)
1064 
1065 /* pb14a_usart0_rxd */
1066 #define PB14A_USART0_RXD \
1067 	SAM_PINMUX(b, 14, a, periph)
1068 
1069 /* pb14b_spi_miso */
1070 #define PB14B_SPI_MISO \
1071 	SAM_PINMUX(b, 14, b, periph)
1072 
1073 /* pb14c_twim3_twd */
1074 #define PB14C_TWIM3_TWD \
1075 	SAM_PINMUX(b, 14, c, periph)
1076 
1077 /* pb14d_tc0_clk1 */
1078 #define PB14D_TC0_CLK1 \
1079 	SAM_PINMUX(b, 14, d, periph)
1080 
1081 /* pb14e_scif_gclk_in0 */
1082 #define PB14E_SCIF_GCLK_IN0 \
1083 	SAM_PINMUX(b, 14, e, periph)
1084 
1085 /* pb14f_lcdca_seg36 */
1086 #define PB14F_LCDCA_SEG36 \
1087 	SAM_PINMUX(b, 14, f, periph)
1088 
1089 /* pb14g_catb_sense1 */
1090 #define PB14G_CATB_SENSE1 \
1091 	SAM_PINMUX(b, 14, g, periph)
1092 
1093 /* pb15_gpio */
1094 #define PB15_GPIO \
1095 	SAM_PINMUX(b, 15, gpio, gpio)
1096 
1097 /* pb15a_usart0_txd */
1098 #define PB15A_USART0_TXD \
1099 	SAM_PINMUX(b, 15, a, periph)
1100 
1101 /* pb15b_spi_mosi */
1102 #define PB15B_SPI_MOSI \
1103 	SAM_PINMUX(b, 15, b, periph)
1104 
1105 /* pb15c_twim3_twck */
1106 #define PB15C_TWIM3_TWCK \
1107 	SAM_PINMUX(b, 15, c, periph)
1108 
1109 /* pb15d_tc0_clk2 */
1110 #define PB15D_TC0_CLK2 \
1111 	SAM_PINMUX(b, 15, d, periph)
1112 
1113 /* pb15e_scif_gclk_in1 */
1114 #define PB15E_SCIF_GCLK_IN1 \
1115 	SAM_PINMUX(b, 15, e, periph)
1116 
1117 /* pb15f_lcdca_seg37 */
1118 #define PB15F_LCDCA_SEG37 \
1119 	SAM_PINMUX(b, 15, f, periph)
1120 
1121 /* pb15g_catb_sense2 */
1122 #define PB15G_CATB_SENSE2 \
1123 	SAM_PINMUX(b, 15, g, periph)
1124 
1125 /* pc0_gpio */
1126 #define PC0_GPIO \
1127 	SAM_PINMUX(c, 0, gpio, gpio)
1128 
1129 /* pc0a_spi_npcs2 */
1130 #define PC0A_SPI_NPCS2 \
1131 	SAM_PINMUX(c, 0, a, periph)
1132 
1133 /* pc0b_usart0_clk */
1134 #define PC0B_USART0_CLK \
1135 	SAM_PINMUX(c, 0, b, periph)
1136 
1137 /* pc0d_tc1_a0 */
1138 #define PC0D_TC1_A0 \
1139 	SAM_PINMUX(c, 0, d, periph)
1140 
1141 /* pc0g_catb_sense3 */
1142 #define PC0G_CATB_SENSE3 \
1143 	SAM_PINMUX(c, 0, g, periph)
1144 
1145 /* pc1_gpio */
1146 #define PC1_GPIO \
1147 	SAM_PINMUX(c, 1, gpio, gpio)
1148 
1149 /* pc1a_spi_npcs3 */
1150 #define PC1A_SPI_NPCS3 \
1151 	SAM_PINMUX(c, 1, a, periph)
1152 
1153 /* pc1b_usart0_rts */
1154 #define PC1B_USART0_RTS \
1155 	SAM_PINMUX(c, 1, b, periph)
1156 
1157 /* pc1d_tc1_b0 */
1158 #define PC1D_TC1_B0 \
1159 	SAM_PINMUX(c, 1, d, periph)
1160 
1161 /* pc1g_catb_sense4 */
1162 #define PC1G_CATB_SENSE4 \
1163 	SAM_PINMUX(c, 1, g, periph)
1164 
1165 /* pc2_gpio */
1166 #define PC2_GPIO \
1167 	SAM_PINMUX(c, 2, gpio, gpio)
1168 
1169 /* pc2a_spi_npcs1 */
1170 #define PC2A_SPI_NPCS1 \
1171 	SAM_PINMUX(c, 2, a, periph)
1172 
1173 /* pc2b_usart0_cts */
1174 #define PC2B_USART0_CTS \
1175 	SAM_PINMUX(c, 2, b, periph)
1176 
1177 /* pc2c_usart0_rxd */
1178 #define PC2C_USART0_RXD \
1179 	SAM_PINMUX(c, 2, c, periph)
1180 
1181 /* pc2d_tc1_a1 */
1182 #define PC2D_TC1_A1 \
1183 	SAM_PINMUX(c, 2, d, periph)
1184 
1185 /* pc2g_catb_sense5 */
1186 #define PC2G_CATB_SENSE5 \
1187 	SAM_PINMUX(c, 2, g, periph)
1188 
1189 /* pc3_gpio */
1190 #define PC3_GPIO \
1191 	SAM_PINMUX(c, 3, gpio, gpio)
1192 
1193 /* pc3a_spi_npcs0 */
1194 #define PC3A_SPI_NPCS0 \
1195 	SAM_PINMUX(c, 3, a, periph)
1196 
1197 /* pc3b_eic_extint5 */
1198 #define PC3B_EIC_EXTINT5 \
1199 	SAM_PINMUX(c, 3, b, periph)
1200 
1201 /* pc3c_usart0_txd */
1202 #define PC3C_USART0_TXD \
1203 	SAM_PINMUX(c, 3, c, periph)
1204 
1205 /* pc3d_tc1_b1 */
1206 #define PC3D_TC1_B1 \
1207 	SAM_PINMUX(c, 3, d, periph)
1208 
1209 /* pc3g_catb_sense6 */
1210 #define PC3G_CATB_SENSE6 \
1211 	SAM_PINMUX(c, 3, g, periph)
1212 
1213 /* pc4_gpio */
1214 #define PC4_GPIO \
1215 	SAM_PINMUX(c, 4, gpio, gpio)
1216 
1217 /* pc4a_spi_miso */
1218 #define PC4A_SPI_MISO \
1219 	SAM_PINMUX(c, 4, a, periph)
1220 
1221 /* pc4b_eic_extint6 */
1222 #define PC4B_EIC_EXTINT6 \
1223 	SAM_PINMUX(c, 4, b, periph)
1224 
1225 /* pc4d_tc1_a2 */
1226 #define PC4D_TC1_A2 \
1227 	SAM_PINMUX(c, 4, d, periph)
1228 
1229 /* pc4g_catb_sense7 */
1230 #define PC4G_CATB_SENSE7 \
1231 	SAM_PINMUX(c, 4, g, periph)
1232 
1233 /* pc5_gpio */
1234 #define PC5_GPIO \
1235 	SAM_PINMUX(c, 5, gpio, gpio)
1236 
1237 /* pc5a_spi_mosi */
1238 #define PC5A_SPI_MOSI \
1239 	SAM_PINMUX(c, 5, a, periph)
1240 
1241 /* pc5b_eic_extint7 */
1242 #define PC5B_EIC_EXTINT7 \
1243 	SAM_PINMUX(c, 5, b, periph)
1244 
1245 /* pc5d_tc1_b2 */
1246 #define PC5D_TC1_B2 \
1247 	SAM_PINMUX(c, 5, d, periph)
1248 
1249 /* pc5g_catb_dis */
1250 #define PC5G_CATB_DIS \
1251 	SAM_PINMUX(c, 5, g, periph)
1252 
1253 /* pc6_gpio */
1254 #define PC6_GPIO \
1255 	SAM_PINMUX(c, 6, gpio, gpio)
1256 
1257 /* pc6a_spi_sck */
1258 #define PC6A_SPI_SCK \
1259 	SAM_PINMUX(c, 6, a, periph)
1260 
1261 /* pc6b_eic_extint8 */
1262 #define PC6B_EIC_EXTINT8 \
1263 	SAM_PINMUX(c, 6, b, periph)
1264 
1265 /* pc6d_tc1_clk0 */
1266 #define PC6D_TC1_CLK0 \
1267 	SAM_PINMUX(c, 6, d, periph)
1268 
1269 /* pc6g_catb_sense8 */
1270 #define PC6G_CATB_SENSE8 \
1271 	SAM_PINMUX(c, 6, g, periph)
1272 
1273 /* pc7_gpio */
1274 #define PC7_GPIO \
1275 	SAM_PINMUX(c, 7, gpio, gpio)
1276 
1277 /* pc7a_adcife_ad7 */
1278 #define PC7A_ADCIFE_AD7 \
1279 	SAM_PINMUX(c, 7, a, periph)
1280 
1281 /* pc7b_usart2_rts */
1282 #define PC7B_USART2_RTS \
1283 	SAM_PINMUX(c, 7, b, periph)
1284 
1285 /* pc7c_pevc_evt0 */
1286 #define PC7C_PEVC_EVT0 \
1287 	SAM_PINMUX(c, 7, c, periph)
1288 
1289 /* pc7d_tc1_clk1 */
1290 #define PC7D_TC1_CLK1 \
1291 	SAM_PINMUX(c, 7, d, periph)
1292 
1293 /* pc7g_catb_sense9 */
1294 #define PC7G_CATB_SENSE9 \
1295 	SAM_PINMUX(c, 7, g, periph)
1296 
1297 /* pc8_gpio */
1298 #define PC8_GPIO \
1299 	SAM_PINMUX(c, 8, gpio, gpio)
1300 
1301 /* pc8a_adcife_ad8 */
1302 #define PC8A_ADCIFE_AD8 \
1303 	SAM_PINMUX(c, 8, a, periph)
1304 
1305 /* pc8b_usart2_clk */
1306 #define PC8B_USART2_CLK \
1307 	SAM_PINMUX(c, 8, b, periph)
1308 
1309 /* pc8c_pevc_evt1 */
1310 #define PC8C_PEVC_EVT1 \
1311 	SAM_PINMUX(c, 8, c, periph)
1312 
1313 /* pc8d_tc1_clk2 */
1314 #define PC8D_TC1_CLK2 \
1315 	SAM_PINMUX(c, 8, d, periph)
1316 
1317 /* pc8e_usart2_cts */
1318 #define PC8E_USART2_CTS \
1319 	SAM_PINMUX(c, 8, e, periph)
1320 
1321 /* pc8g_catb_sense10 */
1322 #define PC8G_CATB_SENSE10 \
1323 	SAM_PINMUX(c, 8, g, periph)
1324 
1325 /* pc9_gpio */
1326 #define PC9_GPIO \
1327 	SAM_PINMUX(c, 9, gpio, gpio)
1328 
1329 /* pc9a_adcife_ad9 */
1330 #define PC9A_ADCIFE_AD9 \
1331 	SAM_PINMUX(c, 9, a, periph)
1332 
1333 /* pc9b_usart3_rxd */
1334 #define PC9B_USART3_RXD \
1335 	SAM_PINMUX(c, 9, b, periph)
1336 
1337 /* pc9c_abdacb_dac0 */
1338 #define PC9C_ABDACB_DAC0 \
1339 	SAM_PINMUX(c, 9, c, periph)
1340 
1341 /* pc9d_iisc_isck */
1342 #define PC9D_IISC_ISCK \
1343 	SAM_PINMUX(c, 9, d, periph)
1344 
1345 /* pc9e_acifc_acan1 */
1346 #define PC9E_ACIFC_ACAN1 \
1347 	SAM_PINMUX(c, 9, e, periph)
1348 
1349 /* pc9g_catb_sense11 */
1350 #define PC9G_CATB_SENSE11 \
1351 	SAM_PINMUX(c, 9, g, periph)
1352 
1353 /* pc10_gpio */
1354 #define PC10_GPIO \
1355 	SAM_PINMUX(c, 10, gpio, gpio)
1356 
1357 /* pc10a_adcife_ad10 */
1358 #define PC10A_ADCIFE_AD10 \
1359 	SAM_PINMUX(c, 10, a, periph)
1360 
1361 /* pc10b_usart3_txd */
1362 #define PC10B_USART3_TXD \
1363 	SAM_PINMUX(c, 10, b, periph)
1364 
1365 /* pc10c_abdacb_dacn0 */
1366 #define PC10C_ABDACB_DACN0 \
1367 	SAM_PINMUX(c, 10, c, periph)
1368 
1369 /* pc10d_iisc_isdi */
1370 #define PC10D_IISC_ISDI \
1371 	SAM_PINMUX(c, 10, d, periph)
1372 
1373 /* pc10e_acifc_acap1 */
1374 #define PC10E_ACIFC_ACAP1 \
1375 	SAM_PINMUX(c, 10, e, periph)
1376 
1377 /* pc10g_catb_sense12 */
1378 #define PC10G_CATB_SENSE12 \
1379 	SAM_PINMUX(c, 10, g, periph)
1380 
1381 /* pc11_gpio */
1382 #define PC11_GPIO \
1383 	SAM_PINMUX(c, 11, gpio, gpio)
1384 
1385 /* pc11a_adcife_ad11 */
1386 #define PC11A_ADCIFE_AD11 \
1387 	SAM_PINMUX(c, 11, a, periph)
1388 
1389 /* pc11b_usart2_rxd */
1390 #define PC11B_USART2_RXD \
1391 	SAM_PINMUX(c, 11, b, periph)
1392 
1393 /* pc11c_pevc_evt2 */
1394 #define PC11C_PEVC_EVT2 \
1395 	SAM_PINMUX(c, 11, c, periph)
1396 
1397 /* pc11g_catb_sense13 */
1398 #define PC11G_CATB_SENSE13 \
1399 	SAM_PINMUX(c, 11, g, periph)
1400 
1401 /* pc12_gpio */
1402 #define PC12_GPIO \
1403 	SAM_PINMUX(c, 12, gpio, gpio)
1404 
1405 /* pc12a_adcife_ad12 */
1406 #define PC12A_ADCIFE_AD12 \
1407 	SAM_PINMUX(c, 12, a, periph)
1408 
1409 /* pc12b_usart2_txd */
1410 #define PC12B_USART2_TXD \
1411 	SAM_PINMUX(c, 12, b, periph)
1412 
1413 /* pc12c_abdacb_clk */
1414 #define PC12C_ABDACB_CLK \
1415 	SAM_PINMUX(c, 12, c, periph)
1416 
1417 /* pc12d_iisc_iws */
1418 #define PC12D_IISC_IWS \
1419 	SAM_PINMUX(c, 12, d, periph)
1420 
1421 /* pc12g_catb_sense14 */
1422 #define PC12G_CATB_SENSE14 \
1423 	SAM_PINMUX(c, 12, g, periph)
1424 
1425 /* pc13_gpio */
1426 #define PC13_GPIO \
1427 	SAM_PINMUX(c, 13, gpio, gpio)
1428 
1429 /* pc13a_adcife_ad13 */
1430 #define PC13A_ADCIFE_AD13 \
1431 	SAM_PINMUX(c, 13, a, periph)
1432 
1433 /* pc13b_usart3_rts */
1434 #define PC13B_USART3_RTS \
1435 	SAM_PINMUX(c, 13, b, periph)
1436 
1437 /* pc13c_abdacb_dac1 */
1438 #define PC13C_ABDACB_DAC1 \
1439 	SAM_PINMUX(c, 13, c, periph)
1440 
1441 /* pc13d_iisc_isdo */
1442 #define PC13D_IISC_ISDO \
1443 	SAM_PINMUX(c, 13, d, periph)
1444 
1445 /* pc13e_acifc_acbn1 */
1446 #define PC13E_ACIFC_ACBN1 \
1447 	SAM_PINMUX(c, 13, e, periph)
1448 
1449 /* pc13g_catb_sense15 */
1450 #define PC13G_CATB_SENSE15 \
1451 	SAM_PINMUX(c, 13, g, periph)
1452 
1453 /* pc14_gpio */
1454 #define PC14_GPIO \
1455 	SAM_PINMUX(c, 14, gpio, gpio)
1456 
1457 /* pc14a_adcife_ad14 */
1458 #define PC14A_ADCIFE_AD14 \
1459 	SAM_PINMUX(c, 14, a, periph)
1460 
1461 /* pc14b_usart3_clk */
1462 #define PC14B_USART3_CLK \
1463 	SAM_PINMUX(c, 14, b, periph)
1464 
1465 /* pc14c_abdacb_dacn1 */
1466 #define PC14C_ABDACB_DACN1 \
1467 	SAM_PINMUX(c, 14, c, periph)
1468 
1469 /* pc14d_iisc_imck */
1470 #define PC14D_IISC_IMCK \
1471 	SAM_PINMUX(c, 14, d, periph)
1472 
1473 /* pc14e_acifc_acbp1 */
1474 #define PC14E_ACIFC_ACBP1 \
1475 	SAM_PINMUX(c, 14, e, periph)
1476 
1477 /* pc14g_catb_dis */
1478 #define PC14G_CATB_DIS \
1479 	SAM_PINMUX(c, 14, g, periph)
1480 
1481 /* pc15_gpio */
1482 #define PC15_GPIO \
1483 	SAM_PINMUX(c, 15, gpio, gpio)
1484 
1485 /* pc15a_tc1_a0 */
1486 #define PC15A_TC1_A0 \
1487 	SAM_PINMUX(c, 15, a, periph)
1488 
1489 /* pc15d_gloc_in4 */
1490 #define PC15D_GLOC_IN4 \
1491 	SAM_PINMUX(c, 15, d, periph)
1492 
1493 /* pc15f_lcdca_seg0 */
1494 #define PC15F_LCDCA_SEG0 \
1495 	SAM_PINMUX(c, 15, f, periph)
1496 
1497 /* pc15g_catb_sense16 */
1498 #define PC15G_CATB_SENSE16 \
1499 	SAM_PINMUX(c, 15, g, periph)
1500 
1501 /* pc16_gpio */
1502 #define PC16_GPIO \
1503 	SAM_PINMUX(c, 16, gpio, gpio)
1504 
1505 /* pc16a_tc1_b0 */
1506 #define PC16A_TC1_B0 \
1507 	SAM_PINMUX(c, 16, a, periph)
1508 
1509 /* pc16d_gloc_in5 */
1510 #define PC16D_GLOC_IN5 \
1511 	SAM_PINMUX(c, 16, d, periph)
1512 
1513 /* pc16f_lcdca_seg1 */
1514 #define PC16F_LCDCA_SEG1 \
1515 	SAM_PINMUX(c, 16, f, periph)
1516 
1517 /* pc16g_catb_sense17 */
1518 #define PC16G_CATB_SENSE17 \
1519 	SAM_PINMUX(c, 16, g, periph)
1520 
1521 /* pc17_gpio */
1522 #define PC17_GPIO \
1523 	SAM_PINMUX(c, 17, gpio, gpio)
1524 
1525 /* pc17a_tc1_a1 */
1526 #define PC17A_TC1_A1 \
1527 	SAM_PINMUX(c, 17, a, periph)
1528 
1529 /* pc17d_gloc_in6 */
1530 #define PC17D_GLOC_IN6 \
1531 	SAM_PINMUX(c, 17, d, periph)
1532 
1533 /* pc17f_lcdca_seg2 */
1534 #define PC17F_LCDCA_SEG2 \
1535 	SAM_PINMUX(c, 17, f, periph)
1536 
1537 /* pc17g_catb_sense18 */
1538 #define PC17G_CATB_SENSE18 \
1539 	SAM_PINMUX(c, 17, g, periph)
1540 
1541 /* pc18_gpio */
1542 #define PC18_GPIO \
1543 	SAM_PINMUX(c, 18, gpio, gpio)
1544 
1545 /* pc18a_tc1_b1 */
1546 #define PC18A_TC1_B1 \
1547 	SAM_PINMUX(c, 18, a, periph)
1548 
1549 /* pc18d_gloc_in7 */
1550 #define PC18D_GLOC_IN7 \
1551 	SAM_PINMUX(c, 18, d, periph)
1552 
1553 /* pc18f_lcdca_seg3 */
1554 #define PC18F_LCDCA_SEG3 \
1555 	SAM_PINMUX(c, 18, f, periph)
1556 
1557 /* pc18g_catb_sense19 */
1558 #define PC18G_CATB_SENSE19 \
1559 	SAM_PINMUX(c, 18, g, periph)
1560 
1561 /* pc19_gpio */
1562 #define PC19_GPIO \
1563 	SAM_PINMUX(c, 19, gpio, gpio)
1564 
1565 /* pc19a_tc1_a2 */
1566 #define PC19A_TC1_A2 \
1567 	SAM_PINMUX(c, 19, a, periph)
1568 
1569 /* pc19d_gloc_out1 */
1570 #define PC19D_GLOC_OUT1 \
1571 	SAM_PINMUX(c, 19, d, periph)
1572 
1573 /* pc19f_lcdca_seg4 */
1574 #define PC19F_LCDCA_SEG4 \
1575 	SAM_PINMUX(c, 19, f, periph)
1576 
1577 /* pc19g_catb_sense20 */
1578 #define PC19G_CATB_SENSE20 \
1579 	SAM_PINMUX(c, 19, g, periph)
1580 
1581 /* pc20_gpio */
1582 #define PC20_GPIO \
1583 	SAM_PINMUX(c, 20, gpio, gpio)
1584 
1585 /* pc20a_tc1_b2 */
1586 #define PC20A_TC1_B2 \
1587 	SAM_PINMUX(c, 20, a, periph)
1588 
1589 /* pc20f_lcdca_seg10 */
1590 #define PC20F_LCDCA_SEG10 \
1591 	SAM_PINMUX(c, 20, f, periph)
1592 
1593 /* pc20g_catb_sense21 */
1594 #define PC20G_CATB_SENSE21 \
1595 	SAM_PINMUX(c, 20, g, periph)
1596 
1597 /* pc21_gpio */
1598 #define PC21_GPIO \
1599 	SAM_PINMUX(c, 21, gpio, gpio)
1600 
1601 /* pc21a_tc1_clk0 */
1602 #define PC21A_TC1_CLK0 \
1603 	SAM_PINMUX(c, 21, a, periph)
1604 
1605 /* pc21d_parc_pcck */
1606 #define PC21D_PARC_PCCK \
1607 	SAM_PINMUX(c, 21, d, periph)
1608 
1609 /* pc21f_lcdca_seg11 */
1610 #define PC21F_LCDCA_SEG11 \
1611 	SAM_PINMUX(c, 21, f, periph)
1612 
1613 /* pc21g_catb_sense22 */
1614 #define PC21G_CATB_SENSE22 \
1615 	SAM_PINMUX(c, 21, g, periph)
1616 
1617 /* pc22_gpio */
1618 #define PC22_GPIO \
1619 	SAM_PINMUX(c, 22, gpio, gpio)
1620 
1621 /* pc22a_tc1_clk1 */
1622 #define PC22A_TC1_CLK1 \
1623 	SAM_PINMUX(c, 22, a, periph)
1624 
1625 /* pc22d_parc_pcen1 */
1626 #define PC22D_PARC_PCEN1 \
1627 	SAM_PINMUX(c, 22, d, periph)
1628 
1629 /* pc22f_lcdca_seg12 */
1630 #define PC22F_LCDCA_SEG12 \
1631 	SAM_PINMUX(c, 22, f, periph)
1632 
1633 /* pc22g_catb_sense23 */
1634 #define PC22G_CATB_SENSE23 \
1635 	SAM_PINMUX(c, 22, g, periph)
1636 
1637 /* pc23_gpio */
1638 #define PC23_GPIO \
1639 	SAM_PINMUX(c, 23, gpio, gpio)
1640 
1641 /* pc23a_tc1_clk2 */
1642 #define PC23A_TC1_CLK2 \
1643 	SAM_PINMUX(c, 23, a, periph)
1644 
1645 /* pc23d_parc_pcen2 */
1646 #define PC23D_PARC_PCEN2 \
1647 	SAM_PINMUX(c, 23, d, periph)
1648 
1649 /* pc23f_lcdca_seg13 */
1650 #define PC23F_LCDCA_SEG13 \
1651 	SAM_PINMUX(c, 23, f, periph)
1652 
1653 /* pc23g_catb_dis */
1654 #define PC23G_CATB_DIS \
1655 	SAM_PINMUX(c, 23, g, periph)
1656 
1657 /* pc24_gpio */
1658 #define PC24_GPIO \
1659 	SAM_PINMUX(c, 24, gpio, gpio)
1660 
1661 /* pc24a_usart1_rts */
1662 #define PC24A_USART1_RTS \
1663 	SAM_PINMUX(c, 24, a, periph)
1664 
1665 /* pc24b_eic_extint1 */
1666 #define PC24B_EIC_EXTINT1 \
1667 	SAM_PINMUX(c, 24, b, periph)
1668 
1669 /* pc24c_pevc_evt0 */
1670 #define PC24C_PEVC_EVT0 \
1671 	SAM_PINMUX(c, 24, c, periph)
1672 
1673 /* pc24d_parc_pcdata0 */
1674 #define PC24D_PARC_PCDATA0 \
1675 	SAM_PINMUX(c, 24, d, periph)
1676 
1677 /* pc24f_lcdca_seg24 */
1678 #define PC24F_LCDCA_SEG24 \
1679 	SAM_PINMUX(c, 24, f, periph)
1680 
1681 /* pc24g_catb_sense24 */
1682 #define PC24G_CATB_SENSE24 \
1683 	SAM_PINMUX(c, 24, g, periph)
1684 
1685 /* pc25_gpio */
1686 #define PC25_GPIO \
1687 	SAM_PINMUX(c, 25, gpio, gpio)
1688 
1689 /* pc25a_usart1_clk */
1690 #define PC25A_USART1_CLK \
1691 	SAM_PINMUX(c, 25, a, periph)
1692 
1693 /* pc25b_eic_extint2 */
1694 #define PC25B_EIC_EXTINT2 \
1695 	SAM_PINMUX(c, 25, b, periph)
1696 
1697 /* pc25c_pevc_evt1 */
1698 #define PC25C_PEVC_EVT1 \
1699 	SAM_PINMUX(c, 25, c, periph)
1700 
1701 /* pc25d_parc_pcdata1 */
1702 #define PC25D_PARC_PCDATA1 \
1703 	SAM_PINMUX(c, 25, d, periph)
1704 
1705 /* pc25f_lcdca_seg25 */
1706 #define PC25F_LCDCA_SEG25 \
1707 	SAM_PINMUX(c, 25, f, periph)
1708 
1709 /* pc25g_catb_sense25 */
1710 #define PC25G_CATB_SENSE25 \
1711 	SAM_PINMUX(c, 25, g, periph)
1712 
1713 /* pc26_gpio */
1714 #define PC26_GPIO \
1715 	SAM_PINMUX(c, 26, gpio, gpio)
1716 
1717 /* pc26a_usart1_rxd */
1718 #define PC26A_USART1_RXD \
1719 	SAM_PINMUX(c, 26, a, periph)
1720 
1721 /* pc26b_eic_extint3 */
1722 #define PC26B_EIC_EXTINT3 \
1723 	SAM_PINMUX(c, 26, b, periph)
1724 
1725 /* pc26c_pevc_evt2 */
1726 #define PC26C_PEVC_EVT2 \
1727 	SAM_PINMUX(c, 26, c, periph)
1728 
1729 /* pc26d_parc_pcdata2 */
1730 #define PC26D_PARC_PCDATA2 \
1731 	SAM_PINMUX(c, 26, d, periph)
1732 
1733 /* pc26e_scif_glkc0 */
1734 #define PC26E_SCIF_GLKC0 \
1735 	SAM_PINMUX(c, 26, e, periph)
1736 
1737 /* pc26f_lcdca_seg26 */
1738 #define PC26F_LCDCA_SEG26 \
1739 	SAM_PINMUX(c, 26, f, periph)
1740 
1741 /* pc26g_catb_sense26 */
1742 #define PC26G_CATB_SENSE26 \
1743 	SAM_PINMUX(c, 26, g, periph)
1744 
1745 /* pc27_gpio */
1746 #define PC27_GPIO \
1747 	SAM_PINMUX(c, 27, gpio, gpio)
1748 
1749 /* pc27a_usart1_txd */
1750 #define PC27A_USART1_TXD \
1751 	SAM_PINMUX(c, 27, a, periph)
1752 
1753 /* pc27b_eic_extint4 */
1754 #define PC27B_EIC_EXTINT4 \
1755 	SAM_PINMUX(c, 27, b, periph)
1756 
1757 /* pc27c_pevc_evt3 */
1758 #define PC27C_PEVC_EVT3 \
1759 	SAM_PINMUX(c, 27, c, periph)
1760 
1761 /* pc27d_parc_pcdata3 */
1762 #define PC27D_PARC_PCDATA3 \
1763 	SAM_PINMUX(c, 27, d, periph)
1764 
1765 /* pc27e_scif_gclk1 */
1766 #define PC27E_SCIF_GCLK1 \
1767 	SAM_PINMUX(c, 27, e, periph)
1768 
1769 /* pc27f_lcdca_seg27 */
1770 #define PC27F_LCDCA_SEG27 \
1771 	SAM_PINMUX(c, 27, f, periph)
1772 
1773 /* pc27g_catb_sense27 */
1774 #define PC27G_CATB_SENSE27 \
1775 	SAM_PINMUX(c, 27, g, periph)
1776 
1777 /* pc28_gpio */
1778 #define PC28_GPIO \
1779 	SAM_PINMUX(c, 28, gpio, gpio)
1780 
1781 /* pc28a_usart3_rxd */
1782 #define PC28A_USART3_RXD \
1783 	SAM_PINMUX(c, 28, a, periph)
1784 
1785 /* pc28b_spi_miso */
1786 #define PC28B_SPI_MISO \
1787 	SAM_PINMUX(c, 28, b, periph)
1788 
1789 /* pc28c_gloc_in4 */
1790 #define PC28C_GLOC_IN4 \
1791 	SAM_PINMUX(c, 28, c, periph)
1792 
1793 /* pc28d_parc_pcdata4 */
1794 #define PC28D_PARC_PCDATA4 \
1795 	SAM_PINMUX(c, 28, d, periph)
1796 
1797 /* pc28e_scif_gclk2 */
1798 #define PC28E_SCIF_GCLK2 \
1799 	SAM_PINMUX(c, 28, e, periph)
1800 
1801 /* pc28f_lcdca_seg28 */
1802 #define PC28F_LCDCA_SEG28 \
1803 	SAM_PINMUX(c, 28, f, periph)
1804 
1805 /* pc28g_catb_sense28 */
1806 #define PC28G_CATB_SENSE28 \
1807 	SAM_PINMUX(c, 28, g, periph)
1808 
1809 /* pc29_gpio */
1810 #define PC29_GPIO \
1811 	SAM_PINMUX(c, 29, gpio, gpio)
1812 
1813 /* pc29a_usart3_txd */
1814 #define PC29A_USART3_TXD \
1815 	SAM_PINMUX(c, 29, a, periph)
1816 
1817 /* pc29b_spi_mosi */
1818 #define PC29B_SPI_MOSI \
1819 	SAM_PINMUX(c, 29, b, periph)
1820 
1821 /* pc29c_gloc_in5 */
1822 #define PC29C_GLOC_IN5 \
1823 	SAM_PINMUX(c, 29, c, periph)
1824 
1825 /* pc29d_parc_pcdata5 */
1826 #define PC29D_PARC_PCDATA5 \
1827 	SAM_PINMUX(c, 29, d, periph)
1828 
1829 /* pc29e_scif_gclk3 */
1830 #define PC29E_SCIF_GCLK3 \
1831 	SAM_PINMUX(c, 29, e, periph)
1832 
1833 /* pc29f_lcdca_seg29 */
1834 #define PC29F_LCDCA_SEG29 \
1835 	SAM_PINMUX(c, 29, f, periph)
1836 
1837 /* pc29g_catb_sense29 */
1838 #define PC29G_CATB_SENSE29 \
1839 	SAM_PINMUX(c, 29, g, periph)
1840 
1841 /* pc30_gpio */
1842 #define PC30_GPIO \
1843 	SAM_PINMUX(c, 30, gpio, gpio)
1844 
1845 /* pc30a_usart3_rts */
1846 #define PC30A_USART3_RTS \
1847 	SAM_PINMUX(c, 30, a, periph)
1848 
1849 /* pc30b_spi_sck */
1850 #define PC30B_SPI_SCK \
1851 	SAM_PINMUX(c, 30, b, periph)
1852 
1853 /* pc30c_gloc_in6 */
1854 #define PC30C_GLOC_IN6 \
1855 	SAM_PINMUX(c, 30, c, periph)
1856 
1857 /* pc30d_parc_pcdata6 */
1858 #define PC30D_PARC_PCDATA6 \
1859 	SAM_PINMUX(c, 30, d, periph)
1860 
1861 /* pc30e_scif_gclk_in0 */
1862 #define PC30E_SCIF_GCLK_IN0 \
1863 	SAM_PINMUX(c, 30, e, periph)
1864 
1865 /* pc30f_lcdca_seg30 */
1866 #define PC30F_LCDCA_SEG30 \
1867 	SAM_PINMUX(c, 30, f, periph)
1868 
1869 /* pc30g_catb_sense30 */
1870 #define PC30G_CATB_SENSE30 \
1871 	SAM_PINMUX(c, 30, g, periph)
1872 
1873 /* pc31_gpio */
1874 #define PC31_GPIO \
1875 	SAM_PINMUX(c, 31, gpio, gpio)
1876 
1877 /* pc31a_usart3_clk */
1878 #define PC31A_USART3_CLK \
1879 	SAM_PINMUX(c, 31, a, periph)
1880 
1881 /* pc31b_spi_npcs0 */
1882 #define PC31B_SPI_NPCS0 \
1883 	SAM_PINMUX(c, 31, b, periph)
1884 
1885 /* pc31c_gloc_out1 */
1886 #define PC31C_GLOC_OUT1 \
1887 	SAM_PINMUX(c, 31, c, periph)
1888 
1889 /* pc31d_parc_pcdata7 */
1890 #define PC31D_PARC_PCDATA7 \
1891 	SAM_PINMUX(c, 31, d, periph)
1892 
1893 /* pc31e_scif_gclk_in1 */
1894 #define PC31E_SCIF_GCLK_IN1 \
1895 	SAM_PINMUX(c, 31, e, periph)
1896 
1897 /* pc31f_lcdca_seg31 */
1898 #define PC31F_LCDCA_SEG31 \
1899 	SAM_PINMUX(c, 31, f, periph)
1900 
1901 /* pc31g_catb_sense31 */
1902 #define PC31G_CATB_SENSE31 \
1903 	SAM_PINMUX(c, 31, g, periph)
1904