Searched refs:SPI_IMR_TXBUFE (Results 1 – 3 of 3) sorted by relevance
144 #define SPI_IMR_TXBUFE (0x1u << 7) /**< \brief (SPI_IMR) Transmit Buffer Empty Interrupt Mask */ macro
548 #define SPI_IMR_TXBUFE (_U_(0x1) << SPI_IMR_TXBUFE_Pos) macro