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Searched refs:SDHC_PSR_BUFWREN_Pos (Results 1 – 4 of 4) sorted by relevance

/hal_atmel-3.5.0-3.4.0/asf/sam0/include/samd51/component/
Dsdhc.h366 #define SDHC_PSR_BUFWREN_Pos 10 /**< \brief (SDHC_PSR) Buffer Write Enable */ macro
367 #define SDHC_PSR_BUFWREN (_U_(0x1) << SDHC_PSR_BUFWREN_Pos)
370 #define SDHC_PSR_BUFWREN_DISABLE (SDHC_PSR_BUFWREN_DISABLE_Val << SDHC_PSR_BUFWREN_Pos)
371 #define SDHC_PSR_BUFWREN_ENABLE (SDHC_PSR_BUFWREN_ENABLE_Val << SDHC_PSR_BUFWREN_Pos)
/hal_atmel-3.5.0-3.4.0/asf/sam0/include/same53/component/
Dsdhc.h366 #define SDHC_PSR_BUFWREN_Pos 10 /**< \brief (SDHC_PSR) Buffer Write Enable */ macro
367 #define SDHC_PSR_BUFWREN (_U_(0x1) << SDHC_PSR_BUFWREN_Pos)
370 #define SDHC_PSR_BUFWREN_DISABLE (SDHC_PSR_BUFWREN_DISABLE_Val << SDHC_PSR_BUFWREN_Pos)
371 #define SDHC_PSR_BUFWREN_ENABLE (SDHC_PSR_BUFWREN_ENABLE_Val << SDHC_PSR_BUFWREN_Pos)
/hal_atmel-3.5.0-3.4.0/asf/sam0/include/same51/component/
Dsdhc.h366 #define SDHC_PSR_BUFWREN_Pos 10 /**< \brief (SDHC_PSR) Buffer Write Enable */ macro
367 #define SDHC_PSR_BUFWREN (_U_(0x1) << SDHC_PSR_BUFWREN_Pos)
370 #define SDHC_PSR_BUFWREN_DISABLE (SDHC_PSR_BUFWREN_DISABLE_Val << SDHC_PSR_BUFWREN_Pos)
371 #define SDHC_PSR_BUFWREN_ENABLE (SDHC_PSR_BUFWREN_ENABLE_Val << SDHC_PSR_BUFWREN_Pos)
/hal_atmel-3.5.0-3.4.0/asf/sam0/include/same54/component/
Dsdhc.h366 #define SDHC_PSR_BUFWREN_Pos 10 /**< \brief (SDHC_PSR) Buffer Write Enable */ macro
367 #define SDHC_PSR_BUFWREN (_U_(0x1) << SDHC_PSR_BUFWREN_Pos)
370 #define SDHC_PSR_BUFWREN_DISABLE (SDHC_PSR_BUFWREN_DISABLE_Val << SDHC_PSR_BUFWREN_Pos)
371 #define SDHC_PSR_BUFWREN_ENABLE (SDHC_PSR_BUFWREN_ENABLE_Val << SDHC_PSR_BUFWREN_Pos)