Searched refs:DMAC_CHSR_ENA0 (Results 1 – 2 of 2) sorted by relevance
181 #define DMAC_CHSR_ENA0 (0x1u << 0) /**< \brief (DMAC_CHSR) Enable [3:0] */ macro
227 #define DMAC_CHSR_ENA0 (0x1u << 0) /**< \brief (DMAC_CHSR) Enable [5:0] */ macro