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Searched refs:DMAC_CHSR_ENA0 (Results 1 – 2 of 2) sorted by relevance

/hal_atmel-3.5.0-3.4.0/asf/sam/include/sam4e/component/
Ddmac.h181 #define DMAC_CHSR_ENA0 (0x1u << 0) /**< \brief (DMAC_CHSR) Enable [3:0] */ macro
/hal_atmel-3.5.0-3.4.0/asf/sam/include/sam3x/component/
Ddmac.h227 #define DMAC_CHSR_ENA0 (0x1u << 0) /**< \brief (DMAC_CHSR) Enable [5:0] */ macro