Searched refs:ui32StartAddr (Results 1 – 14 of 14) sorted by relevance
| /hal_ambiq-latest/mcu/apollo3p/hal/ |
| D | am_hal_security.c | 341 am_hal_crc32_accum(uint32_t ui32StartAddr, uint32_t ui32SizeBytes, uint32_t *pui32Crc) in am_hal_crc32_accum() argument
366 bInternal = ISADDRFLASH(ui32StartAddr) || ISADDRSRAM(ui32StartAddr); in am_hal_crc32_accum()
370 SECURITY->SRCADDR = ui32StartAddr; in am_hal_crc32_accum()
418 pui32Data = (uint32_t*)ui32StartAddr; in am_hal_crc32_accum()
496 am_hal_crc32(uint32_t ui32StartAddr, uint32_t ui32SizeBytes, uint32_t *pui32Crc) in am_hal_crc32() argument
504 status = am_hal_crc32_accum(ui32StartAddr, ui32SizeBytes, pui32Crc); in am_hal_crc32()
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| D | am_hal_security.h | 164 uint32_t am_hal_crc32_accum(uint32_t ui32StartAddr, uint32_t ui32SizeBytes, uint32_t *pui32Crc) ;
179 uint32_t am_hal_crc32(uint32_t ui32StartAddr, uint32_t ui32SizeBytes, uint32_t *pui32Crc) ;
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| D | am_hal_cachectrl.c | 395 if ((pNcCfg->ui32StartAddr & ~CACHECTRL_NCR0START_ADDR_Msk) || in am_hal_cachectrl_control()
403 CACHECTRL->NCR0START = pNcCfg->ui32StartAddr; in am_hal_cachectrl_control()
409 CACHECTRL->NCR1START = pNcCfg->ui32StartAddr; in am_hal_cachectrl_control()
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| D | am_hal_cachectrl.h | 108 uint32_t ui32StartAddr; member
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| /hal_ambiq-latest/mcu/apollo3/hal/ |
| D | am_hal_security.c | 403 am_hal_crc32_accum(uint32_t ui32StartAddr, uint32_t ui32SizeBytes, uint32_t *pui32Crc) in am_hal_crc32_accum() argument
428 bInternal = ISADDRFLASH(ui32StartAddr) || ISADDRSRAM(ui32StartAddr); in am_hal_crc32_accum()
432 SECURITY->SRCADDR = ui32StartAddr; in am_hal_crc32_accum()
480 pui32Data = (uint32_t*)ui32StartAddr; in am_hal_crc32_accum()
558 am_hal_crc32(uint32_t ui32StartAddr, uint32_t ui32SizeBytes, uint32_t *pui32Crc) in am_hal_crc32() argument
566 status = am_hal_crc32_accum(ui32StartAddr, ui32SizeBytes, pui32Crc); in am_hal_crc32()
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| D | am_hal_security.h | 164 uint32_t am_hal_crc32_accum(uint32_t ui32StartAddr, uint32_t ui32SizeBytes, uint32_t *pui32Crc) ;
179 uint32_t am_hal_crc32(uint32_t ui32StartAddr, uint32_t ui32SizeBytes, uint32_t *pui32Crc) ;
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| D | am_hal_cachectrl.c | 374 if ((pNcCfg->ui32StartAddr & ~CACHECTRL_NCR0START_ADDR_Msk) || in am_hal_cachectrl_control()
382 CACHECTRL->NCR0START = pNcCfg->ui32StartAddr; in am_hal_cachectrl_control()
388 CACHECTRL->NCR1START = pNcCfg->ui32StartAddr; in am_hal_cachectrl_control()
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| D | am_hal_cachectrl.h | 108 uint32_t ui32StartAddr; member
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| /hal_ambiq-latest/mcu/apollo4p/hal/ |
| D | am_hal_security.c | 208 am_hal_crc32(uint32_t ui32StartAddr, uint32_t ui32SizeBytes, uint32_t *pui32Crc) in am_hal_crc32() argument
233 SECURITY->SRCADDR = ui32StartAddr; in am_hal_crc32()
237 if ((ui32StartAddr + ui32SizeBytes) >= (SRAM_BASEADDR + TCM_MAX_SIZE)) in am_hal_crc32()
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| D | am_hal_security.h | 186 uint32_t am_hal_crc32(uint32_t ui32StartAddr, uint32_t ui32SizeBytes, uint32_t *pui32Crc);
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| /hal_ambiq-latest/mcu/apollo4p/hal/mcu/ |
| D | am_hal_cachectrl.c | 297 if ((pNcCfg->ui32StartAddr & ~CPU_NCR0START_ADDR_Msk) || in am_hal_cachectrl_control()
305 CPU->NCR0START = pNcCfg->ui32StartAddr; in am_hal_cachectrl_control()
311 CPU->NCR1START = pNcCfg->ui32StartAddr; in am_hal_cachectrl_control()
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| D | am_hal_cachectrl.h | 106 uint32_t ui32StartAddr; member
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| D | am_hal_card.h | 1607 uint32_t ui32StartAddr,
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| D | am_hal_card.c | 4596 uint32_t ui32StartAddr, in am_hal_sdio_card_calibrate() argument
4732 …tus = am_hal_sdio_card_multi_bytes_write_sync(&SdioCard, ui32FuncNum, ui32StartAddr, (uint8_t *)ui… in am_hal_sdio_card_calibrate()
4742 …atus = am_hal_sdio_card_multi_bytes_read_sync(&SdioCard, ui32FuncNum, ui32StartAddr, (uint8_t *)ui… in am_hal_sdio_card_calibrate()
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