Searched refs:am_hal_pwrctrl_peripheral_control (Results 1 – 3 of 3) sorted by relevance
107 am_hal_pwrctrl_peripheral_control[AM_HAL_PWRCTRL_PERIPH_MAX] = variable287 PWRCTRL->DEVPWREN |= am_hal_pwrctrl_peripheral_control[ePeripheral].ui32PeriphEnable; in am_hal_pwrctrl_periph_enable()294 … if ((PWRCTRL->DEVPWRSTATUS & am_hal_pwrctrl_peripheral_control[ePeripheral].ui32PeriphStatus) > 0) in am_hal_pwrctrl_periph_enable()303 … if ((PWRCTRL->DEVPWRSTATUS & am_hal_pwrctrl_peripheral_control[ePeripheral].ui32PeriphStatus) > 0) in am_hal_pwrctrl_periph_enable()313 PWRCTRL->DEVPWREN &= ~am_hal_pwrctrl_peripheral_control[ePeripheral].ui32PeriphEnable; in am_hal_pwrctrl_periph_enable()334 switch (am_hal_pwrctrl_peripheral_control[ePeripheral].ui32PeriphStatus) in pwrctrl_periph_disable_msk_check()337 …if (((HCPxMask & HCPA_MASK) > 0) && ((HCPxMask & am_hal_pwrctrl_peripheral_control[ePeripheral].ui… in pwrctrl_periph_disable_msk_check()344 …if (((HCPxMask & HCPB_MASK) > 0) && ((HCPxMask & am_hal_pwrctrl_peripheral_control[ePeripheral].ui… in pwrctrl_periph_disable_msk_check()351 …if (((HCPxMask & HCPC_MASK) > 0) && ((HCPxMask & am_hal_pwrctrl_peripheral_control[ePeripheral].ui… in pwrctrl_periph_disable_msk_check()377 PWRCTRL->DEVPWREN &= ~am_hal_pwrctrl_peripheral_control[ePeripheral].ui32PeriphEnable; in am_hal_pwrctrl_periph_disable()[all …]
119 am_hal_pwrctrl_peripheral_control[AM_HAL_PWRCTRL_PERIPH_MAX] = variable303 PWRCTRL->DEVPWREN |= am_hal_pwrctrl_peripheral_control[ePeripheral].ui32PeriphEnable; in am_hal_pwrctrl_periph_enable()310 … if ((PWRCTRL->DEVPWRSTATUS & am_hal_pwrctrl_peripheral_control[ePeripheral].ui32PeriphStatus) > 0) in am_hal_pwrctrl_periph_enable()319 … if ((PWRCTRL->DEVPWRSTATUS & am_hal_pwrctrl_peripheral_control[ePeripheral].ui32PeriphStatus) > 0) in am_hal_pwrctrl_periph_enable()329 PWRCTRL->DEVPWREN &= ~am_hal_pwrctrl_peripheral_control[ePeripheral].ui32PeriphEnable; in am_hal_pwrctrl_periph_enable()349 switch (am_hal_pwrctrl_peripheral_control[ePeripheral].ui32PeriphStatus) in pwrctrl_periph_disable_msk_check()352 …if (((HCPxMSPIxMask & HCPA_MASK) > 0) && ((HCPxMSPIxMask & am_hal_pwrctrl_peripheral_control[ePeri… in pwrctrl_periph_disable_msk_check()359 …if (((HCPxMSPIxMask & HCPB_MASK) > 0) && ((HCPxMSPIxMask & am_hal_pwrctrl_peripheral_control[ePeri… in pwrctrl_periph_disable_msk_check()366 …if (((HCPxMSPIxMask & HCPC_MASK) > 0) && ((HCPxMSPIxMask & am_hal_pwrctrl_peripheral_control[ePeri… in pwrctrl_periph_disable_msk_check()373 …if (((HCPxMSPIxMask & MSPI_MASK) > 0) && ((HCPxMSPIxMask & am_hal_pwrctrl_peripheral_control[ePeri… in pwrctrl_periph_disable_msk_check()[all …]
264 const struct am_pwr_s am_hal_pwrctrl_peripheral_control[AM_HAL_PWRCTRL_PERIPH_MAX] = variable490 *pwr_ctrl = am_hal_pwrctrl_peripheral_control[ePeripheral]; in am_get_pwrctrl()
