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Searched refs:MSPI0_DEV0DDR_ENABLEDQS0_Pos (Results 1 – 2 of 2) sorted by relevance

/hal_ambiq-latest/CMSIS/AmbiqMicro/Include/
Dapollo4b_generic.h41877 #define MSPI0_DEV0DDR_ENABLEDQS0_Pos (2UL) /*!< ENABLEDQS0 (Bit 2) … macro
Dapollo4p.h42613 #define MSPI0_DEV0DDR_ENABLEDQS0_Pos (2UL) /*!< ENABLEDQS0 (Bit 2) … macro