Searched refs:DEVADDR (Results 1 – 4 of 4) sorted by relevance
6170 …__IOM uint32_t DEVADDR : 10; /*!< [9..0] I2C address of the device that the Master wi… member7537 …__IOM uint32_t DEVADDR : 32; /*!< [31..0] SPI Device address for automated DMA transa… member
6878 …__IOM uint32_t DEVADDR : 10; /*!< [9..0] I2C address of the device that the Master wi… member8420 …__IOM uint32_t DEVADDR : 32; /*!< [31..0] SPI Device address for automated DMA transa… member
17623 …__IOM uint32_t DEVADDR : 10; /*!< [9..0] I2C address of the device that the Master wi… member19478 …__IOM uint32_t DEVADDR : 32; /*!< [31..0] SPI Device address for automated DMA transa… member
17722 …__IOM uint32_t DEVADDR : 10; /*!< [9..0] I2C address of the device that the Master wi… member19701 …__IOM uint32_t DEVADDR : 32; /*!< [31..0] SPI Device address for automated DMA transa… member
