| /hal_ambiq-3.7.0/mcu/apollo3p/hal/ |
| D | am_hal_burst.c | 111 if ( 0 == MCUCTRL->SKU_b.ALLOWBURST ) in am_hal_burst_mode_initialize()
154 MCUCTRL->FEATUREENABLE_b.BURSTREQ = 1; in am_hal_burst_mode_initialize()
157 (uint32_t)&MCUCTRL->FEATUREENABLE, in am_hal_burst_mode_initialize()
169 if ( 0 == MCUCTRL->FEATUREENABLE_b.BURSTAVAIL ) in am_hal_burst_mode_initialize()
182 if ( MCUCTRL->FEATUREENABLE_b.BURSTACK == 0 ) in am_hal_burst_mode_initialize()
388 MCUCTRL->VRCTRL1_b.BLEBUCKPDNB = 0; in am_hal_burst_ldo_charge()
389 MCUCTRL->VRCTRL1_b.BLEBUCKRSTB = 0; in am_hal_burst_ldo_charge()
390 MCUCTRL->VRCTRL1_b.BLEBUCKACTIVE = 1; in am_hal_burst_ldo_charge()
391 MCUCTRL->VRCTRL1_b.BLEBUCKOVER = 1; in am_hal_burst_ldo_charge()
401 MCUCTRL->VRCTRL2_b.BURSTLDOPDNB = 1; in am_hal_burst_ldo_charge()
[all …]
|
| D | am_hal_mcuctrl.c | 102 psDevice->ui32ChipPN = MCUCTRL->CHIPPN; in device_info_get()
107 psDevice->ui32ChipID0 = MCUCTRL->CHIPID0; in device_info_get()
112 psDevice->ui32ChipID1 = MCUCTRL->CHIPID1; in device_info_get()
117 psDevice->ui32ChipRev = MCUCTRL->CHIPREV; in device_info_get()
122 psDevice->ui32VendorID = MCUCTRL->VENDORID; in device_info_get()
127 psDevice->ui32SKU = MCUCTRL->SKU; in device_info_get()
199 ui32FaultStat = MCUCTRL->FAULTSTATUS; in mcuctrl_fault_status()
207 psFault->ui32DCODE = MCUCTRL->DCODEFAULTADDR; in mcuctrl_fault_status()
212 psFault->ui32ICODE |= MCUCTRL->ICODEFAULTADDR; in mcuctrl_fault_status()
217 psFault->ui32SYS |= MCUCTRL->SYSFAULTADDR; in mcuctrl_fault_status()
[all …]
|
| D | am_hal_pwrctrl.c | 613 ui32RegBackupVal = MCUCTRL->LDOREG2; in am_hal_pwrctrl_bleif_workaround()
630 MCUCTRL->LDOREG2 &= ~MCUCTRL_LDOREG2_MEMLDOACTIVETRIM_Msk; in am_hal_pwrctrl_bleif_workaround()
631 MCUCTRL->LDOREG2 |= _VAL2FLD(MCUCTRL_LDOREG2_MEMLDOACTIVETRIM, ui32TrimVal); in am_hal_pwrctrl_bleif_workaround()
636 ui32RegBackupVal = MCUCTRL->SIMOBUCK1; in am_hal_pwrctrl_bleif_workaround()
653 MCUCTRL->SIMOBUCK1 &= ~MCUCTRL_SIMOBUCK1_MEMACTIVETRIM_Msk; in am_hal_pwrctrl_bleif_workaround()
654 MCUCTRL->SIMOBUCK1 |= _VAL2FLD(MCUCTRL_SIMOBUCK1_MEMACTIVETRIM, ui32TrimVal); in am_hal_pwrctrl_bleif_workaround()
684 MCUCTRL->LDOREG2 &= ~TRIM22_MEMLDOACTIVETRIM_Msk; in am_hal_pwrctrl_bleif_workaround()
685 MCUCTRL->LDOREG2 |= _VAL2FLD(TRIM22_MEMLDOACTIVETRIM, ui32TrimVal); in am_hal_pwrctrl_bleif_workaround()
707 MCUCTRL->SIMOBUCK1 &= ~TRIM28_MEMACTIVETRIM_Msk; in am_hal_pwrctrl_bleif_workaround()
708 MCUCTRL->SIMOBUCK1 |= _VAL2FLD(TRIM28_MEMACTIVETRIM, ui32TrimVal); in am_hal_pwrctrl_bleif_workaround()
[all …]
|
| D | am_hal_tpiu.c | 67 MCUCTRL->TPIUCTRL |= MCUCTRL_TPIUCTRL_ENABLE_Msk; in am_hal_tpiu_clock_enable()
83 MCUCTRL->TPIUCTRL &= ~MCUCTRL_TPIUCTRL_ENABLE_Msk; in am_hal_tpiu_clock_disable()
199 MCUCTRL->TPIUCTRL |= psConfig->ui32TraceClkIn; in am_hal_tpiu_configure()
307 MCUCTRL->TPIUCTRL = in am_hal_tpiu_enable()
344 MCUCTRL->TPIUCTRL = psConfig->ui32TraceClkIn; in am_hal_tpiu_enable()
366 MCUCTRL->TPIUCTRL = in am_hal_tpiu_disable()
|
| D | am_hal_mcuctrl.h | 66 ((MCUCTRL->CHIPREV & \
72 ((MCUCTRL->CHIPREV & \
78 ((MCUCTRL->CHIPREV & \
84 ((MCUCTRL->CHIPREV & \
93 ((MCUCTRL->CHIPREV & \
99 ((MCUCTRL->CHIPREV & \
|
| D | am_hal_security.c | 191 pSecInfo->bInfo0Valid = MCUCTRL->SHADOWVALID_b.INFO0_VALID; in am_hal_security_get_info()
193 if ( MCUCTRL->BOOTLOADER_b.SECBOOTFEATURE ) in am_hal_security_get_info()
536 if ( MCUCTRL->SHADOWVALID_b.INFO0_VALID && in am_hal_bootloader_exit()
537 MCUCTRL->BOOTLOADER_b.PROTLOCK ) in am_hal_bootloader_exit()
566 MCUCTRL->BOOTLOADER = _VAL2FLD(MCUCTRL_BOOTLOADER_PROTLOCK, 1); in am_hal_bootloader_exit()
571 if (MCUCTRL->SCRATCH0 & 0x1) in am_hal_bootloader_exit()
581 MCUCTRL->SCRATCH0 &= ~0x1; in am_hal_bootloader_exit()
|
| D | am_hal_secure_ota.c | 138 MCUCTRL->OTAPOINTER = otaDescAddr; in am_hal_ota_init()
192 MCUCTRL->OTAPOINTER_b.OTAVALID = 1; in am_hal_ota_add()
195 MCUCTRL->OTAPOINTER_b.OTASBLUPDATE = 1; in am_hal_ota_add()
|
| D | am_hal_itm.c | 117 if ( MCUCTRL->TPIUCTRL == 0 ) in am_hal_itm_disable()
156 MCUCTRL->TPIUCTRL = in am_hal_itm_disable()
159 while (MCUCTRL->TPIUCTRL); in am_hal_itm_disable()
|
| /hal_ambiq-3.7.0/mcu/apollo4p/hal/ |
| D | am_hal_audadc.c | 1854 …temp = _FLD2VAL(MCUCTRL_PGACTRL1_PGACHABYPASSEN, MCUCTRL->PGACTRL1) & 0x2; // keep CHA1 bypassen s… in am_hal_audadc_gain_set()
1857 …MCUCTRL->PGACTRL1 = ((MCUCTRL->PGACTRL1 & ~MCUCTRL_PGACTRL1_PGACHABYPASSEN_Msk) | _VAL2FLD(MCUCTRL… in am_hal_audadc_gain_set()
1858 …MCUCTRL->PGACTRL1 = ((MCUCTRL->PGACTRL1 & ~MCUCTRL_PGACTRL1_PGACHAOPAMPINPDNB_Msk) | _VAL2FLD(MCUC… in am_hal_audadc_gain_set()
1860 …MCUCTRL->PGACTRL1 = ((MCUCTRL->PGACTRL1 & ~MCUCTRL_PGACTRL1_PGACHA0GAIN1SEL_Msk) | _VAL2FLD(MCUCTR… in am_hal_audadc_gain_set()
1861 …MCUCTRL->PGACTRL1 = ((MCUCTRL->PGACTRL1 & ~MCUCTRL_PGACTRL1_PGACHA0GAIN2SEL_Msk) | _VAL2FLD(MCUCTR… in am_hal_audadc_gain_set()
1862 …MCUCTRL->PGACTRL1 = ((MCUCTRL->PGACTRL1 & ~MCUCTRL_PGACTRL1_PGACHA0GAIN2DIV2SEL_Msk) | _VAL2FLD(MC… in am_hal_audadc_gain_set()
1865 …temp = _FLD2VAL(MCUCTRL_PGACTRL1_PGACHABYPASSEN, MCUCTRL->PGACTRL1) & 0x1; // keep CHA0 bypassen s… in am_hal_audadc_gain_set()
1868 …MCUCTRL->PGACTRL1 = ((MCUCTRL->PGACTRL1 & ~MCUCTRL_PGACTRL1_PGACHABYPASSEN_Msk) | _VAL2FLD(MCUCTRL… in am_hal_audadc_gain_set()
1869 …MCUCTRL->PGACTRL1 = ((MCUCTRL->PGACTRL1 & ~MCUCTRL_PGACTRL1_PGACHAOPAMPINPDNB_Msk) | _VAL2FLD(MCUC… in am_hal_audadc_gain_set()
1870 …MCUCTRL->PGACTRL1 = ((MCUCTRL->PGACTRL1 & ~MCUCTRL_PGACTRL1_PGACHA1GAIN1SEL_Msk) | _VAL2FLD(MCUCTR… in am_hal_audadc_gain_set()
[all …]
|
| D | am_hal_pwrctrl.c | 1731 MCUCTRL->SIMOBUCK12_b.ACTTRIMVDDF = i32VddfActTrim; in crypto_boost_trims()
1737 MCUCTRL->LDOREG2_b.MEMLDOACTIVETRIM = i32LDOActTrim; in crypto_boost_trims()
1744 MCUCTRL->LDOREG2_b.MEMLDOACTIVETRIM = i32LDOActTrim; in crypto_boost_trims()
1750 MCUCTRL->SIMOBUCK12_b.ACTTRIMVDDF = i32VddfActTrim; in crypto_boost_trims()
2250 MCUCTRL->PWRSW0 |= _VAL2FLD(MCUCTRL_PWRSW0_PWRSWVDDMDSP0DYNSEL, 1) | in am_hal_pwrctrl_low_power_init()
2262 MCUCTRL->AUDADCPWRDLY_b.AUDADCPWR1 = 4; in am_hal_pwrctrl_low_power_init()
2269 g_orig_ACTTRIMVDDF = MCUCTRL->SIMOBUCK12_b.ACTTRIMVDDF; in am_hal_pwrctrl_low_power_init()
2270 g_orig_MEMLDOACTIVETRIM = MCUCTRL->LDOREG2_b.MEMLDOACTIVETRIM; in am_hal_pwrctrl_low_power_init()
2271 g_orig_LPTRIMVDDF = MCUCTRL->SIMOBUCK12_b.LPTRIMVDDF; in am_hal_pwrctrl_low_power_init()
2272 g_orig_MEMLPLDOTRIM = MCUCTRL->LDOREG2_b.MEMLPLDOTRIM; in am_hal_pwrctrl_low_power_init()
[all …]
|
| /hal_ambiq-3.7.0/mcu/apollo4p/hal/mcu/ |
| D | am_hal_mcuctrl.c | 164 psDevice->ui32ChipPN = MCUCTRL->CHIPPN; in device_info_get()
169 psDevice->ui32ChipID0 = MCUCTRL->CHIPID0; in device_info_get()
174 psDevice->ui32ChipID1 = MCUCTRL->CHIPID1; in device_info_get()
179 psDevice->ui32ChipRev = MCUCTRL->CHIPREV; in device_info_get()
184 psDevice->ui32VendorID = MCUCTRL->VENDORID; in device_info_get()
189 psDevice->ui32SKU = MCUCTRL->SKU; in device_info_get()
199 psDevice->ui32MRAMSize = g_am_hal_mcuctrl_sku_mram_size[MCUCTRL->SKU_b.SKUMRAMSIZE] * 1024; in device_info_get()
209 psDevice->ui32SSRAMSize = (g_am_hal_mcuctrl_sku_ssram_size[MCUCTRL->SKU_b.SKUSRAMSIZE][0] + in device_info_get()
210 … g_am_hal_mcuctrl_sku_ssram_size[MCUCTRL->SKU_b.SKUSRAMSIZE][1]) * 1024; in device_info_get()
358 MCUCTRL->XTALHSTRIMS = ui32TrimReg; // ok in mcuctrl_ctrl_HFXTAL_normal()
[all …]
|
| D | am_hal_mcuctrl.h | 135 ((MCUCTRL->CHIPREV & MCUCTRL_CHIPREV_REVMAJ_Msk) == \
139 ((MCUCTRL->CHIPREV & \
145 ((MCUCTRL->CHIPREV & \
151 ((MCUCTRL->CHIPREV & \
160 ((MCUCTRL->CHIPREV & \
166 ((MCUCTRL->CHIPREV & \
172 ((MCUCTRL->CHIPREV & \
178 ((MCUCTRL->CHIPREV & \
184 ((MCUCTRL->CHIPREV & \
190 ((MCUCTRL->CHIPREV & \
|
| D | am_hal_sysctrl.c | 107 (MCUCTRL->DBGCTRL_b.CM4TPIUENABLE == MCUCTRL_DBGCTRL_CM4TPIUENABLE_DIS) ) in am_hal_sysctrl_sleep()
152 MCUCTRL->SIMOBUCK13_b.ACTTRIMVDDS = g_ui32origSimobuckVDDStrim; in am_hal_sysctrl_sleep()
153 MCUCTRL->PWRSW1_b.SHORTVDDFVDDSORVAL = 0; in am_hal_sysctrl_sleep()
154 MCUCTRL->PWRSW1_b.SHORTVDDFVDDSOREN = 0; in am_hal_sysctrl_sleep()
198 MCUCTRL->PWRSW1_b.SHORTVDDFVDDSORVAL = 1; in am_hal_sysctrl_sleep()
199 MCUCTRL->PWRSW1_b.SHORTVDDFVDDSOREN = 1; in am_hal_sysctrl_sleep()
201 MCUCTRL->SIMOBUCK13_b.ACTTRIMVDDS = 0; // VDDS trim level to 0 in am_hal_sysctrl_sleep()
|
| D | am_hal_secure_ota.c | 106 MCUCTRL->OTAPOINTER = otaDescAddr; in am_hal_ota_init()
155 MCUCTRL->OTAPOINTER_b.OTAVALID = 1; in am_hal_ota_add()
158 MCUCTRL->OTAPOINTER_b.OTASBLUPDATE = 1; in am_hal_ota_add()
173 am_hal_otadesc_t *pOtaDesc = (am_hal_otadesc_t *)AM_HAL_OTA_GET_BLOB_PTR(MCUCTRL->OTAPOINTER); in am_hal_get_ota_status()
194 *pOtaDescStatus = MCUCTRL->OTAPOINTER & AM_HAL_OTADESC_STATUS_MASK; in am_hal_get_ota_status()
|
| D | am_hal_itm.c | 109 if ( MCUCTRL->DBGCTRL == 0 ) in am_hal_itm_disable()
148 MCUCTRL->DBGCTRL_b.CM4CLKSEL = MCUCTRL_DBGCTRL_CM4CLKSEL_LOWPWR; in am_hal_itm_disable()
149 MCUCTRL->DBGCTRL_b.CM4TPIUENABLE = MCUCTRL_DBGCTRL_CM4TPIUENABLE_DIS; in am_hal_itm_disable()
150 MCUCTRL->DBGCTRL_b.DBGTSCLKSEL = MCUCTRL_DBGCTRL_DBGTSCLKSEL_LOWPWR; in am_hal_itm_disable()
151 while (MCUCTRL->DBGCTRL); in am_hal_itm_disable()
|
| D | am_hal_tpiu.c | 131 MCUCTRL->DBGCTRL_b.CM4CLKSEL = MCUCTRL_DBGCTRL_CM4CLKSEL_HFRC48; in am_hal_tpiu_enable()
132 MCUCTRL->DBGCTRL_b.CM4TPIUENABLE = MCUCTRL_DBGCTRL_CM4TPIUENABLE_EN; in am_hal_tpiu_enable()
155 MCUCTRL->DBGCTRL_b.CM4CLKSEL = MCUCTRL_DBGCTRL_CM4CLKSEL_LOWPWR; in am_hal_tpiu_disable()
156 MCUCTRL->DBGCTRL_b.CM4TPIUENABLE = MCUCTRL_DBGCTRL_CM4TPIUENABLE_DIS; in am_hal_tpiu_disable()
|
| /hal_ambiq-3.7.0/mcu/apollo3/hal/ |
| D | am_hal_mcuctrl.c | 102 psDevice->ui32ChipPN = MCUCTRL->CHIPPN; in device_info_get()
107 psDevice->ui32ChipID0 = MCUCTRL->CHIPID0; in device_info_get()
112 psDevice->ui32ChipID1 = MCUCTRL->CHIPID1; in device_info_get()
117 psDevice->ui32ChipRev = MCUCTRL->CHIPREV; in device_info_get()
122 psDevice->ui32VendorID = MCUCTRL->VENDORID; in device_info_get()
127 psDevice->ui32SKU = MCUCTRL->SKU; in device_info_get()
199 ui32FaultStat = MCUCTRL->FAULTSTATUS; in mcuctrl_fault_status()
207 psFault->ui32DCODE = MCUCTRL->DCODEFAULTADDR; in mcuctrl_fault_status()
212 psFault->ui32ICODE |= MCUCTRL->ICODEFAULTADDR; in mcuctrl_fault_status()
217 psFault->ui32SYS |= MCUCTRL->SYSFAULTADDR; in mcuctrl_fault_status()
[all …]
|
| D | am_hal_pwrctrl.c | 558 MCUCTRL->SIMOBUCK2_b.SIMOBUCKCORELPHIGHTONTRIM = 2; in simobuck_updates()
559 MCUCTRL->SIMOBUCK2_b.SIMOBUCKCORELPLOWTONTRIM = 3; in simobuck_updates()
560 MCUCTRL->SIMOBUCK3_b.SIMOBUCKCORELPHIGHTOFFTRIM = 5; in simobuck_updates()
561 MCUCTRL->SIMOBUCK3_b.SIMOBUCKCORELPLOWTOFFTRIM = 2; in simobuck_updates()
562 MCUCTRL->SIMOBUCK3_b.SIMOBUCKMEMLPHIGHTOFFTRIM = 6; in simobuck_updates()
563 MCUCTRL->SIMOBUCK3_b.SIMOBUCKMEMLPLOWTOFFTRIM = 1; in simobuck_updates()
564 MCUCTRL->SIMOBUCK3_b.SIMOBUCKMEMLPHIGHTONTRIM = 3; in simobuck_updates()
565 MCUCTRL->SIMOBUCK4_b.SIMOBUCKMEMLPLOWTONTRIM = 3; in simobuck_updates()
573 MCUCTRL->SIMOBUCK4_b.SIMOBUCKCOMP2TIMEOUTEN = 0; in simobuck_updates()
629 MCUCTRL->FEATUREENABLE_b.BLEREQ = 1; in am_hal_pwrctrl_low_power_init()
[all …]
|
| D | am_hal_tpiu.c | 67 MCUCTRL->TPIUCTRL |= MCUCTRL_TPIUCTRL_ENABLE_Msk; in am_hal_tpiu_clock_enable()
83 MCUCTRL->TPIUCTRL &= ~MCUCTRL_TPIUCTRL_ENABLE_Msk; in am_hal_tpiu_clock_disable()
199 MCUCTRL->TPIUCTRL |= psConfig->ui32TraceClkIn; in am_hal_tpiu_configure()
307 MCUCTRL->TPIUCTRL = in am_hal_tpiu_enable()
344 MCUCTRL->TPIUCTRL = psConfig->ui32TraceClkIn; in am_hal_tpiu_enable()
366 MCUCTRL->TPIUCTRL = in am_hal_tpiu_disable()
|
| D | am_hal_burst.c | 70 if ( 0 == MCUCTRL->SKU_b.ALLOWBURST ) in am_hal_burst_mode_initialize()
88 MCUCTRL->FEATUREENABLE_b.BURSTREQ = 1; in am_hal_burst_mode_initialize()
91 (uint32_t)&MCUCTRL->FEATUREENABLE, in am_hal_burst_mode_initialize()
103 if ( 0 == MCUCTRL->FEATUREENABLE_b.BURSTAVAIL ) in am_hal_burst_mode_initialize()
116 if ( MCUCTRL->FEATUREENABLE_b.BURSTACK == 0 ) in am_hal_burst_mode_initialize()
|
| D | am_hal_mcuctrl.h | 66 ((MCUCTRL->CHIPREV & \
72 ((MCUCTRL->CHIPREV & \
78 ((MCUCTRL->CHIPREV & \
87 ((MCUCTRL->CHIPREV & \
93 ((MCUCTRL->CHIPREV & \
|
| D | am_hal_security.c | 210 pSecInfo->bInfo0Valid = MCUCTRL->SHADOWVALID_b.INFO0_VALID; in am_hal_security_get_info()
212 if ( MCUCTRL->BOOTLOADER_b.SECBOOTFEATURE ) in am_hal_security_get_info()
598 if ( MCUCTRL->SHADOWVALID_b.INFO0_VALID && in am_hal_bootloader_exit()
599 MCUCTRL->BOOTLOADER_b.PROTLOCK ) in am_hal_bootloader_exit()
625 MCUCTRL->BOOTLOADER = _VAL2FLD(MCUCTRL_BOOTLOADER_PROTLOCK, 1); in am_hal_bootloader_exit()
630 if (MCUCTRL->SCRATCH0 & 0x1) in am_hal_bootloader_exit()
640 MCUCTRL->SCRATCH0 &= ~0x1; in am_hal_bootloader_exit()
|
| D | am_hal_sysctrl.c | 89 (MCUCTRL->TPIUCTRL_b.ENABLE == MCUCTRL_TPIUCTRL_ENABLE_DIS) ) in am_hal_sysctrl_sleep()
104 uint32_t ui32Simobuck1Backup = MCUCTRL->SIMOBUCK1; in am_hal_sysctrl_sleep()
145 MCUCTRL->SIMOBUCK1 = ui32SimoBuck1Working; in am_hal_sysctrl_sleep()
155 MCUCTRL->SIMOBUCK1 = ui32Simobuck1Backup; in am_hal_sysctrl_sleep()
|
| D | am_hal_secure_ota.c | 138 MCUCTRL->OTAPOINTER = otaDescAddr; in am_hal_ota_init()
192 MCUCTRL->OTAPOINTER_b.OTAVALID = 1; in am_hal_ota_add()
195 MCUCTRL->OTAPOINTER_b.OTASBLUPDATE = 1; in am_hal_ota_add()
|
| D | am_hal_itm.c | 117 if ( MCUCTRL->TPIUCTRL == 0 ) in am_hal_itm_disable()
156 MCUCTRL->TPIUCTRL = in am_hal_itm_disable()
159 while (MCUCTRL->TPIUCTRL); in am_hal_itm_disable()
|
