1 //***************************************************************************** 2 // 3 //! @file am_hal_pwrctrl.h 4 //! 5 //! @brief Functions for enabling and disabling power domains. 6 //! 7 //! @addtogroup pwrctrl3 Pwrctrl - Power Control 8 //! @ingroup apollo3_hal 9 //! @{ 10 // 11 //***************************************************************************** 12 13 //***************************************************************************** 14 // 15 // Copyright (c) 2023, Ambiq Micro, Inc. 16 // All rights reserved. 17 // 18 // Redistribution and use in source and binary forms, with or without 19 // modification, are permitted provided that the following conditions are met: 20 // 21 // 1. Redistributions of source code must retain the above copyright notice, 22 // this list of conditions and the following disclaimer. 23 // 24 // 2. Redistributions in binary form must reproduce the above copyright 25 // notice, this list of conditions and the following disclaimer in the 26 // documentation and/or other materials provided with the distribution. 27 // 28 // 3. Neither the name of the copyright holder nor the names of its 29 // contributors may be used to endorse or promote products derived from this 30 // software without specific prior written permission. 31 // 32 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 33 // AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 34 // IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 35 // ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 36 // LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 37 // CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 38 // SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 39 // INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 40 // CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 41 // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 42 // POSSIBILITY OF SUCH DAMAGE. 43 // 44 // This is part of revision release_sdk_3_1_1-10cda4b5e0 of the AmbiqSuite Development Package. 45 // 46 //***************************************************************************** 47 48 #ifndef AM_HAL_PWRCTRL_H 49 #define AM_HAL_PWRCTRL_H 50 51 // 52 //! Designate this peripheral. 53 // 54 #define AM_APOLLO3_PWRCTRL 1 55 56 typedef enum 57 { 58 AM_HAL_PWRCTRL_PERIPH_NONE, 59 AM_HAL_PWRCTRL_PERIPH_IOS, 60 AM_HAL_PWRCTRL_PERIPH_IOM0, 61 AM_HAL_PWRCTRL_PERIPH_IOM1, 62 AM_HAL_PWRCTRL_PERIPH_IOM2, 63 AM_HAL_PWRCTRL_PERIPH_IOM3, 64 AM_HAL_PWRCTRL_PERIPH_IOM4, 65 AM_HAL_PWRCTRL_PERIPH_IOM5, 66 AM_HAL_PWRCTRL_PERIPH_UART0, 67 AM_HAL_PWRCTRL_PERIPH_UART1, 68 AM_HAL_PWRCTRL_PERIPH_ADC, 69 AM_HAL_PWRCTRL_PERIPH_SCARD, 70 AM_HAL_PWRCTRL_PERIPH_MSPI, 71 AM_HAL_PWRCTRL_PERIPH_PDM, 72 AM_HAL_PWRCTRL_PERIPH_BLEL, 73 AM_HAL_PWRCTRL_PERIPH_MAX 74 } am_hal_pwrctrl_periph_e; 75 76 typedef enum 77 { 78 AM_HAL_PWRCTRL_MEM_NONE, 79 AM_HAL_PWRCTRL_MEM_SRAM_8K_DTCM, 80 AM_HAL_PWRCTRL_MEM_SRAM_32K_DTCM, 81 AM_HAL_PWRCTRL_MEM_SRAM_64K_DTCM, 82 AM_HAL_PWRCTRL_MEM_SRAM_96K, 83 AM_HAL_PWRCTRL_MEM_SRAM_128K, 84 AM_HAL_PWRCTRL_MEM_SRAM_160K, 85 AM_HAL_PWRCTRL_MEM_SRAM_192K, 86 AM_HAL_PWRCTRL_MEM_SRAM_224K, 87 AM_HAL_PWRCTRL_MEM_SRAM_256K, 88 AM_HAL_PWRCTRL_MEM_SRAM_288K, 89 AM_HAL_PWRCTRL_MEM_SRAM_320K, 90 AM_HAL_PWRCTRL_MEM_SRAM_352K, 91 AM_HAL_PWRCTRL_MEM_SRAM_384K, 92 AM_HAL_PWRCTRL_MEM_FLASH_512K, 93 AM_HAL_PWRCTRL_MEM_FLASH_1M, 94 AM_HAL_PWRCTRL_MEM_CACHE, 95 AM_HAL_PWRCTRL_MEM_ALL, 96 AM_HAL_PWRCTRL_MEM_MAX 97 } am_hal_pwrctrl_mem_e; 98 99 #define AM_HAL_PWRCTRL_MEM_FLASH_MIN AM_HAL_PWRCTRL_MEM_FLASH_512K 100 #define AM_HAL_PWRCTRL_MEM_FLASH_MAX AM_HAL_PWRCTRL_MEM_FLASH_1M 101 102 #define AM_HAL_PWRCTRL_MEM_SRAM_MIN AM_HAL_PWRCTRL_MEM_SRAM_8K_DTCM 103 #define AM_HAL_PWRCTRL_MEM_SRAM_MAX AM_HAL_PWRCTRL_MEM_SRAM_384K 104 105 //***************************************************************************** 106 // 107 // Macros to check whether Apollo3 bucks are enabled. 108 // 109 //***************************************************************************** 110 #define am_hal_pwrctrl_simobuck_enabled_check() \ 111 (PWRCTRL->SUPPLYSTATUS_b.SIMOBUCKON) 112 113 #define am_hal_pwrctrl_blebuck_enabled_check() \ 114 (PWRCTRL->SUPPLYSTATUS_b.BLEBUCKON) 115 116 117 #ifdef __cplusplus 118 extern "C" 119 { 120 #endif 121 122 //***************************************************************************** 123 // 124 // Function prototypes 125 // 126 //***************************************************************************** 127 //***************************************************************************** 128 // 129 //! @brief Enable power to a peripheral. 130 //! 131 //! @param ePeripheral - The peripheral to enable. 132 //! 133 //! This function enables power to the peripheral and waits for a 134 //! confirmation from the hardware. 135 //! 136 //! @return status - generic or interface specific status. 137 // 138 //***************************************************************************** 139 extern uint32_t am_hal_pwrctrl_periph_enable(am_hal_pwrctrl_periph_e ePeripheral); 140 141 //***************************************************************************** 142 // 143 //! @brief Disable power to a peripheral. 144 //! 145 //! @param ePeripheral - The peripheral to disable. 146 //! 147 //! This function disables power to the peripheral and waits for a 148 //! confirmation from the hardware. 149 //! 150 //! @return status - generic or interface specific status. 151 // 152 //***************************************************************************** 153 extern uint32_t am_hal_pwrctrl_periph_disable(am_hal_pwrctrl_periph_e ePeripheral); 154 155 //***************************************************************************** 156 // 157 //! @brief Determine whether a peripheral is currently enabled. 158 //! 159 //! @param ePeripheral - The peripheral to enable. 160 //! @param pui32Enabled - Pointer to a ui32 that will return as 1 or 0. 161 //! 162 //! This function determines to the caller whether a given peripheral is 163 //! currently enabled or disabled. 164 //! 165 //! @return status - generic or interface specific status. 166 // 167 //***************************************************************************** 168 extern uint32_t am_hal_pwrctrl_periph_enabled( 169 am_hal_pwrctrl_periph_e ePeripheral, uint32_t *pui32Enabled); 170 171 //***************************************************************************** 172 // 173 //! @brief Enable a configuration of memory. 174 //! 175 //! @param eMemConfig - The memory configuration. 176 //! 177 //! This function establishes the desired configuration of flash, SRAM, ICache, 178 //! and DCache (DTCM) according to the desired Memory Configuration mask. 179 //! 180 //! @note Only the type of memory specified is affected. Therefore separate calls 181 //! are required to affect power settings for FLASH, SRAM, or CACHE. 182 //! 183 //! @return status - generic or interface specific status. 184 // 185 //***************************************************************************** 186 extern uint32_t am_hal_pwrctrl_memory_enable(am_hal_pwrctrl_mem_e eMemConfig); 187 188 //***************************************************************************** 189 // 190 //! @brief Power down respective memory. 191 //! 192 //! @param eMemConfig - The memory power down enum. 193 //! 194 //! This function establishes the desired power down of flash, SRAM, ICache, 195 //! and DCache (DTCM) according to the desired enum. 196 //! 197 //! @note Only the type of memory specified is affected. Therefore separate calls 198 //! are required to affect power settings for FLASH, SRAM, or CACHE. 199 //! 200 //! @return status - generic or interface specific status. 201 // 202 //***************************************************************************** 203 extern uint32_t am_hal_pwrctrl_memory_deepsleep_powerdown(am_hal_pwrctrl_mem_e eMemConfig); 204 205 //***************************************************************************** 206 // 207 //! @brief Apply retention voltage to respective memory. 208 //! 209 //! @param eMemConfig - The memory power down enum. 210 //! 211 //! This function establishes the desired power retain of flash, SRAM, ICache, 212 //! and DCache (DTCM) according to the desired enum. 213 //! 214 //! @note Only the type of memory specified is affected. Therefore separate calls 215 //! are required to affect power settings for FLASH, SRAM, or CACHE. 216 //! 217 //! @return status - generic or interface specific status. 218 // 219 //***************************************************************************** 220 extern uint32_t am_hal_pwrctrl_memory_deepsleep_retain(am_hal_pwrctrl_mem_e eMemConfig); 221 222 //***************************************************************************** 223 // 224 //! @brief Initialize system for low power configuration. 225 //! 226 //! This function handles low power initialization. 227 //! 228 //! @return status - generic or interface specific status. 229 // 230 //***************************************************************************** 231 extern uint32_t am_hal_pwrctrl_low_power_init(void); 232 233 //***************************************************************************** 234 // 235 //! @brief Initialize BLE Buck Trims for Lowest Power. 236 //! 237 // 238 //***************************************************************************** 239 extern void am_hal_pwrctrl_blebuck_trim(void); 240 241 #ifdef __cplusplus 242 } 243 #endif 244 245 #endif // AM_HAL_PWRCTRL_H 246 247 //***************************************************************************** 248 // 249 // End Doxygen group. 250 //! @} 251 // 252 //***************************************************************************** 253
