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Searched refs:CLKEN (Results 1 – 5 of 5) sorted by relevance

/hal_ambiq-3.6.0/mcu/apollo4p/hal/
Dam_hal_pdm.c341 PDMn(ui32Module)->CTRL_b.CLKEN = 0; in am_hal_pdm_configure()
374 PDMn(ui32Module)->CTRL_b.CLKEN = 0; in am_hal_pdm_config_ctrlReg()
399 PDMn(ui32Module)->CTRL_b.CLKEN = 1; in am_hal_pdm_enable()
443 PDMn(ui32Module)->CTRL_b.CLKEN = 1; in am_hal_pdm_clk_enable()
491 PDMn(ui32Module)->CTRL_b.CLKEN = 0; in am_hal_pdm_disable()
/hal_ambiq-3.6.0/mcu/apollo4p/hal/mcu/
Dam_hal_uart.c648 UARTn(ui32Module)->CR_b.CLKEN = 1; in am_hal_uart_configure()
Dam_hal_sdhc.c1182 pSDHC->CLOCKCTRL_b.CLKEN = 0x1; in am_hal_sdhc_set_bus_clock()
/hal_ambiq-3.6.0/CMSIS/AmbiqMicro/Include/
Dapollo4b_generic.h19781 …__IOM uint32_t CLKEN : 1; /*!< [0..0] PDM Clock enable.If multiple clocks are enab… member
21889 …__IOM uint32_t CLKEN : 1; /*!< [0..0] This bit is set to 0 when the HD is not usin… member
25265 …__IOM uint32_t CLKEN : 1; /*!< [3..3] This bit is the UART clock enable. … member
Dapollo4p.h20001 …__IOM uint32_t CLKEN : 1; /*!< [0..0] PDM Clock enable.If multiple clocks are enab… member
22187 …__IOM uint32_t CLKEN : 1; /*!< [0..0] This bit is set to 0 when the HD is not usin… member
25760 …__IOM uint32_t CLKEN : 1; /*!< [3..3] This bit is the UART clock enable. … member