Searched refs:__IOM (Results 1 – 3 of 3) sorted by relevance
184 #ifndef __IOM /*!< Fallback for older CMSIS versions …185 #define __IOM __IO macro237 …__IOM uint32_t CFG; /*!< (@ 0x00000000) The ADC Configuration Register con…246 …__IOM uint32_t ADCEN : 1; /*!< [0..0] This bit enables the ADC module. While the A…253 …__IOM uint32_t RPTEN : 1; /*!< [2..2] This bit enables Repeating Scan Mode. …254 …__IOM uint32_t LPMODE : 1; /*!< [3..3] Select power mode to enter between active sc…255 …__IOM uint32_t CKMODE : 1; /*!< [4..4] Clock mode register …257 …__IOM uint32_t DFIFORDEN : 1; /*!< [12..12] Destructive FIFO Read Enable. Setting this…260 …__IOM uint32_t TRIGSEL : 3; /*!< [18..16] Select the ADC trigger source. …261 …__IOM uint32_t TRIGPOL : 1; /*!< [19..19] This bit selects the ADC trigger polarity …[all …]
178 #define __IOM volatile /*! Defines 'read / write' structure member permissions */ macro189 #ifndef __IOM /*!< Fallback for older CMSIS versions …190 #define __IOM __IO macro242 …__IOM uint32_t CFG; /*!< (@ 0x00000000) The ADC Configuration Register con…251 …__IOM uint32_t ADCEN : 1; /*!< [0..0] This bit enables the ADC module. While the A…258 …__IOM uint32_t RPTEN : 1; /*!< [2..2] This bit enables Repeating Scan Mode. …259 …__IOM uint32_t LPMODE : 1; /*!< [3..3] Select power mode to enter between active sc…260 …__IOM uint32_t CKMODE : 1; /*!< [4..4] Clock mode register …262 …__IOM uint32_t DFIFORDEN : 1; /*!< [12..12] Destructive FIFO Read Enable. Setting this…265 …__IOM uint32_t TRIGSEL : 3; /*!< [18..16] Select the ADC trigger source. …[all …]
121 __IOM uint32_t CFG0; //32bit126 __IOM uint8_t FuncAddr : 7;131 __IOM uint8_t EnableSuspendM : 1;133 __IOM uint8_t Resume : 1;136 __IOM uint8_t HSEnable : 1;137 __IOM uint8_t VersionSpecific : 1;138 __IOM uint8_t ISOUpdate : 1;142 __IOM uint16_t INTRIN; // 0x2,3145 __IOM uint16_t EP0 : 1;146 __IOM uint16_t EP1 : 1;[all …]
