| /hal_altera-latest/drivers/altera_msgdma/HAL/inc/ |
| D | altera_msgdma.h | 55 alt_u32 u32[2]; 86 alt_u32 *read_address; 87 alt_u32 *write_address; 88 alt_u32 transfer_length; 89 alt_u32 control; 96 alt_u32 *read_address_low; 97 alt_u32 *write_address_low; 98 alt_u32 transfer_length; 104 alt_u32 *read_address_high; 105 alt_u32 *write_address_high; [all …]
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| /hal_altera-latest/drivers/altera_generic_qspi_controller2/HAL/inc/ |
| D | altera_generic_quad_spi_controller2.h | 53 alt_u32 data_base; /** base address of data slave */ 54 alt_u32 data_end; /** end address of data slave (not inclusive) */ 55 alt_u32 csr_base; /** base address of CSR slave */ 56 alt_u32 size_in_bytes; /** size of memory in bytes */ 57 alt_u32 is_epcs; /** 1 if device is an EPCS device */ 58 alt_u32 number_of_sectors; /** number of flash sectors */ 59 alt_u32 sector_size; /** size of each flash sector */ 60 alt_u32 page_size; /** page size */ 61 alt_u32 silicon_id; /** ID of silicon used with EPCQ/QSPI IP */ 84 .data_base = ((alt_u32)(avl_mem##_BASE)), \ [all …]
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| /hal_altera-latest/drivers/altera_epcq_controller/HAL/inc/ |
| D | altera_epcq_controller.h | 48 alt_u32 data_base; /** base address of data slave */ 49 alt_u32 data_end; /** end address of data slave (not inclusive) */ 50 alt_u32 csr_base; /** base address of CSR slave */ 51 alt_u32 size_in_bytes; /** size of memory in bytes */ 52 alt_u32 is_epcs; /** 1 if device is an EPCS device */ 53 alt_u32 number_of_sectors; /** number of flash sectors */ 54 alt_u32 sector_size; /** size of each flash sector */ 55 alt_u32 page_size; /** page size */ 56 alt_u32 silicon_id; /** ID of silicon used with EPCQ IP */ 77 .data_base = ((alt_u32)(avl_mem##_BASE)), \ [all …]
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| /hal_altera-latest/include/priv/ |
| D | alt_legacy_irq.h | 59 extern int alt_irq_register (alt_u32 id, 66 static ALT_INLINE int ALT_ALWAYS_INLINE alt_irq_disable (alt_u32 id) in alt_irq_disable() 69 extern volatile alt_u32 alt_irq_active; in alt_irq_disable() 84 static ALT_INLINE int ALT_ALWAYS_INLINE alt_irq_enable (alt_u32 id) in alt_irq_enable() 87 extern volatile alt_u32 alt_irq_active; in alt_irq_enable() 116 static ALT_INLINE alt_u32 ALT_ALWAYS_INLINE alt_irq_interruptible (alt_u32 priority) in alt_irq_interruptible() 118 extern volatile alt_u32 alt_priority_mask; in alt_irq_interruptible() 119 extern volatile alt_u32 alt_irq_active; in alt_irq_interruptible() 121 alt_u32 old_priority; in alt_irq_interruptible() 137 static ALT_INLINE void ALT_ALWAYS_INLINE alt_irq_non_interruptible (alt_u32 mask) in alt_irq_non_interruptible() [all …]
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| /hal_altera-latest/drivers/altera_avalon_i2c/HAL/inc/ |
| D | altera_avalon_i2c.h | 96 typedef alt_u32 ALT_AVALON_I2C_STATUS_CODE; 152 alt_u32 *i2c_base; 154 alt_u32 irq_controller_ID; 156 alt_u32 irq_ID; 162 alt_u32 control; 164 alt_u32 master_target_address; 166 alt_u32 cmd_fifo_size; 168 alt_u32 rx_fifo_size; 170 alt_u32 ip_freq_in_hz; 189 ((alt_u32 *)(name##_BASE)), \ [all …]
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| /hal_altera-latest/drivers/altera_avalon_sgdma/HAL/inc/ |
| D | altera_avalon_sgdma.h | 60 alt_u32 *descriptor_base; // reserved 61 alt_u32 next_index; // reserved 62 alt_u32 num_descriptors; // reserved 67 alt_u32 chain_control; // Value OR'd into control reg 87 alt_u32 *read_addr, 88 alt_u32 *write_addr, 96 alt_u32 *read_addr, 97 alt_u32 *write_addr, 107 alt_u32 *write_addr, 114 alt_u32 *write_addr, [all …]
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| D | altera_avalon_sgdma_descriptor.h | 96 alt_u32 *read_addr; 97 alt_u32 read_addr_pad; 99 alt_u32 *write_addr; 100 alt_u32 write_addr_pad; 102 alt_u32 *next; 103 alt_u32 next_pad;
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| /hal_altera-latest/altera_hal/HAL/inc/sys/ |
| D | alt_alarm.h | 66 alt_u32 nticks, 67 alt_u32 (*callback) (void* context), 82 static ALT_INLINE alt_u32 ALT_ALWAYS_INLINE alt_ticks_per_second (void) in alt_ticks_per_second() 92 static ALT_INLINE int ALT_ALWAYS_INLINE alt_sysclk_init (alt_u32 nticks) in alt_sysclk_init() 109 static ALT_INLINE alt_u32 ALT_ALWAYS_INLINE alt_nticks (void) in alt_nticks() 125 static ALT_INLINE alt_u32 ALT_ALWAYS_INLINE alt_ticks_per_second (void) in alt_ticks_per_second() 135 static ALT_INLINE int ALT_ALWAYS_INLINE alt_sysclk_init (alt_u32 nticks) in alt_sysclk_init() 144 static ALT_INLINE alt_u32 ALT_ALWAYS_INLINE alt_nticks (void) in alt_nticks()
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| D | alt_cache.h | 51 extern void alt_icache_flush (void* start, alt_u32 len); 59 extern void alt_dcache_flush (void* start, alt_u32 len); 67 extern void alt_dcache_flush_no_writeback (void* start, alt_u32 len); 98 extern volatile void* alt_remap_uncached (void* ptr, alt_u32 len); 105 extern void* alt_remap_cached (volatile void* ptr, alt_u32 len);
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| D | alt_load.h | 65 static void ALT_INLINE alt_load_section (alt_u32* from, in alt_load_section() 66 alt_u32* to, in alt_load_section() 67 alt_u32* end) in alt_load_section()
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| /hal_altera-latest/include/sys/ |
| D | alt_irq.h | 77 typedef void (*alt_isr_func)(void* isr_context, alt_u32 id); 193 extern int alt_ic_isr_register(alt_u32 ic_id, 194 alt_u32 irq, 203 int alt_ic_irq_enable (alt_u32 ic_id, alt_u32 irq); 204 int alt_ic_irq_disable(alt_u32 ic_id, alt_u32 irq); 210 alt_u32 alt_ic_irq_enabled(alt_u32 ic_id, alt_u32 irq); 229 static ALT_INLINE alt_u32 ALT_ALWAYS_INLINE alt_irq_pending (void) in alt_irq_pending() 231 alt_u32 active; in alt_irq_pending()
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| /hal_altera-latest/drivers/altera_avalon_spi/HAL/inc/ |
| D | altera_avalon_spi.h | 65 int alt_avalon_spi_command(alt_u32 base, alt_u32 slave, 66 alt_u32 write_length, const alt_u8 * write_data, 67 alt_u32 read_length, alt_u8 * read_data, 68 alt_u32 flags);
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| /hal_altera-latest/drivers/altera_avalon_spi/HAL/src/ |
| D | altera_avalon_spi.c | 39 int alt_avalon_spi_command(alt_u32 base, alt_u32 slave, in alt_avalon_spi_command() 40 alt_u32 write_length, const alt_u8 * write_data, in alt_avalon_spi_command() 41 alt_u32 read_length, alt_u8 * read_data, in alt_avalon_spi_command() 42 alt_u32 flags) in alt_avalon_spi_command() 47 alt_u32 write_zeros = read_length; in alt_avalon_spi_command() 48 alt_u32 read_ignore = write_length; in alt_avalon_spi_command() 49 alt_u32 status; in alt_avalon_spi_command() 104 alt_u32 rxdata = IORD_ALTERA_AVALON_SPI_RXDATA(base); in alt_avalon_spi_command()
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| /hal_altera-latest/altera_hal/HAL/inc/priv/ |
| D | alt_alarm.h | 61 alt_u32 time; /* time in system ticks of the callback */ 62 alt_u32 (*callback) (void* context); /* callback function. The return 81 extern alt_u32 _alt_tick_rate; 89 extern volatile alt_u32 _alt_nticks;
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| D | alt_exception_handler_registry.h | 35 (alt_exception_cause, alt_u32, alt_u32);
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| D | alt_iic_isr_register.h | 34 extern int alt_iic_isr_register(alt_u32 ic_id, alt_u32 irq, alt_isr_func isr,
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| /hal_altera-latest/drivers/altera_msgdma/HAL/src/ |
| D | altera_msgdma.c | 49 alt_u32 *csr_base, 50 alt_u32 *descriptor_base, 53 alt_u32 *csr_base, 54 alt_u32 *descriptor_base, 60 alt_u32 *read_address, 61 alt_u32 *write_address, 62 alt_u32 length, 63 alt_u32 control); 67 alt_u32 *read_address, 68 alt_u32 *write_address, [all …]
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| /hal_altera-latest/drivers/altera_generic_qspi_controller2/HAL/src/ |
| D | altera_generic_quad_spi_controller2.c | 42 …validate_read_write_arguments(alt_qspi_controller2_dev *flash_info,alt_u32 offset, alt_u32 length); 74 int alt_qspi_controller2_lock(alt_flash_dev *flash_info, alt_u32 sectors_to_lock) in alt_qspi_controller2_lock() 78 alt_u32 mem_op_value = 0; /* value to write to EPCQ_MEM_OP register */ in alt_qspi_controller2_lock() 82 alt_u32 result = 0; in alt_qspi_controller2_lock() 294 alt_u32 mem_op_value = 0; /* value to write to EPCQ_MEM_OP register */ in alt_qspi_controller2_erase_block() 298 alt_u32 sector_number = 0; in alt_qspi_controller2_erase_block() 456 alt_u32 buffer_offset = 0; /** offset into data buffer to get write data */ in alt_qspi_controller2_write_block() 458 alt_u32 remaining_length = length; /** length left to write */ in alt_qspi_controller2_write_block() 460 alt_u32 write_offset = data_offset; /** offset into flash to write too */ in alt_qspi_controller2_write_block() 518 alt_u32 word_to_write = 0xFFFFFFFF; /** initialize word to write to blank word */ in alt_qspi_controller2_write_block() [all …]
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| /hal_altera-latest/drivers/altera_epcq_controller/HAL/src/ |
| D | altera_epcq_controller.c | 42 …_validate_read_write_arguments(alt_epcq_controller_dev *flash_info,alt_u32 offset, alt_u32 length); 72 int alt_epcq_controller_lock(alt_flash_dev *flash_info, alt_u32 sectors_to_lock) in alt_epcq_controller_lock() 74 alt_u32 mem_op_value = 0; /* value to write to EPCQ_MEM_OP register */ in alt_epcq_controller_lock() 76 alt_u32 result = 0; in alt_epcq_controller_lock() 182 alt_u32 mem_op_value = 0; /* value to write to EPCQ_MEM_OP register */ in alt_epcq_controller_erase_block() 184 alt_u32 sector_number = 0; in alt_epcq_controller_erase_block() 263 alt_u32 buffer_offset = 0; /** offset into data buffer to get write data */ in alt_epcq_controller_write_block() 264 alt_u32 remaining_length = length; /** length left to write */ in alt_epcq_controller_write_block() 265 alt_u32 write_offset = data_offset; /** offset into flash to write too */ in alt_epcq_controller_write_block() 294 alt_u32 word_to_write = 0xFFFFFFFF; /** initialize word to write to blank word */ in alt_epcq_controller_write_block() [all …]
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| /hal_altera-latest/drivers/altera_avalon_sgdma/HAL/src/ |
| D | altera_avalon_sgdma.c | 86 alt_u32 control; in alt_avalon_sgdma_do_async_transfer() 106 IOWR_ALTERA_AVALON_SGDMA_NEXT_DESC_POINTER(dev->base, (alt_u32) desc); in alt_avalon_sgdma_do_async_transfer() 197 IOWR_ALTERA_AVALON_SGDMA_NEXT_DESC_POINTER(dev->base, (alt_u32) desc); in alt_avalon_sgdma_do_sync_transfer() 256 alt_u32 *read_addr, in alt_avalon_sgdma_construct_mem_to_mem_desc() 257 alt_u32 *write_addr, in alt_avalon_sgdma_construct_mem_to_mem_desc() 285 alt_u32 *read_addr, in alt_avalon_sgdma_construct_mem_to_mem_desc_burst() 286 alt_u32 *write_addr, in alt_avalon_sgdma_construct_mem_to_mem_desc_burst() 310 alt_u32 *write_addr, in alt_avalon_sgdma_construct_stream_to_mem_desc() 341 alt_u32 *write_addr, in alt_avalon_sgdma_construct_stream_to_mem_desc_burst() 349 (alt_u32) 0x0, // Read addr: N/A in stream-to-mem mode in alt_avalon_sgdma_construct_stream_to_mem_desc_burst() [all …]
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| /hal_altera-latest/drivers/altera_avalon_timer/HAL/src/ |
| D | altera_avalon_timer_sc.c | 54 static void alt_avalon_timer_sc_irq (void* base, alt_u32 id) in alt_avalon_timer_sc_irq() 87 void alt_avalon_timer_sc_init (void* base, alt_u32 irq_controller_id, in alt_avalon_timer_sc_init() 88 alt_u32 irq, alt_u32 freq) in alt_avalon_timer_sc_init()
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| /hal_altera-latest/drivers/altera_avalon_uart/HAL/inc/ |
| D | altera_avalon_uart.h | 154 alt_u32 ctrl; /* Shadow value of the control register */ 155 volatile alt_u32 rx_start; /* Start of the pending receive data */ 156 volatile alt_u32 rx_end; /* End of the pending receive data */ 157 volatile alt_u32 tx_start; /* Start of the pending transmit data */ 158 volatile alt_u32 tx_end; /* End of the pending transmit data */ 161 alt_u32 freq; /* Current baud rate */ 163 alt_u32 flags; /* Configuation flags */ 258 alt_u32 irq_controller_id, alt_u32 irq);
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| /hal_altera-latest/altera_hal/HAL/src/ |
| D | altera_common.c | 15 int alt_ic_isr_register(alt_u32 ic_id, alt_u32 irq, in alt_ic_isr_register() 31 int alt_irq_register(alt_u32 irq, void* context, alt_isr_func isr) in alt_irq_register() 45 void alt_handle_irq(void* base, alt_u32 id) in alt_handle_irq()
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| /hal_altera-latest/drivers/altera_avalon_uart/HAL/src/ |
| D | altera_avalon_uart_init.c | 55 static void altera_avalon_uart_irq(void* context, alt_u32 id); 59 alt_u32 status); 61 alt_u32 status); 65 alt_u32 irq_controller_id, alt_u32 irq) in altera_avalon_uart_init() 107 static void altera_avalon_uart_irq(void* context, alt_u32 id) in altera_avalon_uart_irq() 110 alt_u32 status; in altera_avalon_uart_irq() 151 altera_avalon_uart_rxirq(altera_avalon_uart_state* sp, alt_u32 status) in altera_avalon_uart_rxirq() 153 alt_u32 next; in altera_avalon_uart_rxirq() 205 altera_avalon_uart_txirq(altera_avalon_uart_state* sp, alt_u32 status) in altera_avalon_uart_txirq()
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| /hal_altera-latest/drivers/altera_avalon_timer/HAL/inc/ |
| D | altera_avalon_timer.h | 55 #define alt_sysclk_type alt_u32 61 #define alt_timestamp_type alt_u32 70 extern void alt_avalon_timer_sc_init (void* base, alt_u32 irq_controller_id, 71 alt_u32 irq, alt_u32 freq); 79 extern alt_u32 altera_avalon_timer_ts_freq;
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