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Searched refs:IOWR_32DIRECT (Results 1 – 8 of 8) sorted by relevance

/hal_altera-latest/drivers/altera_msgdma/inc/
Daltera_msgdma_descriptor_regs.h129 IOWR_32DIRECT(base, ALTERA_MSGDMA_DESCRIPTOR_READ_ADDRESS_REG, data)
131 IOWR_32DIRECT(base, ALTERA_MSGDMA_DESCRIPTOR_WRITE_ADDRESS_REG, data)
133 IOWR_32DIRECT(base, ALTERA_MSGDMA_DESCRIPTOR_LENGTH_REG, data)
137 IOWR_32DIRECT(base, ALTERA_MSGDMA_DESCRIPTOR_CONTROL_STANDARD_REG, data)
149 IOWR_32DIRECT(base, ALTERA_MSGDMA_DESCRIPTOR_READ_ADDRESS_HIGH_REG, data)
151 IOWR_32DIRECT(base, ALTERA_MSGDMA_DESCRIPTOR_WRITE_ADDRESS_HIGH_REG, data)
155 IOWR_32DIRECT(base, ALTERA_MSGDMA_DESCRIPTOR_CONTROL_ENHANCED_REG, data)
Daltera_msgdma_prefetcher_regs.h266 IOWR_32DIRECT(base, ALT_MSGDMA_PREFETCHER_CONTROL_OFST, data)
271 IOWR_32DIRECT(base, ALT_MSGDMA_PREFETCHER_NEXT_DESCRIPTOR_PTR_LOW_OFST, data)
276 IOWR_32DIRECT(base, ALT_MSGDMA_PREFETCHER_NEXT_DESCRIPTOR_PTR_HIGH_OFST, data)
281 IOWR_32DIRECT(base, ALT_MSGDMA_PREFETCHER_DESCRIPTOR_POLL_FREQ_OFST, data)
286 IOWR_32DIRECT(base, ALT_MSGDMA_PREFETCHER_STATUS_OFST, data)
Daltera_msgdma_csr_regs.h155 IOWR_32DIRECT(base, ALTERA_MSGDMA_CSR_STATUS_REG, data)
157 IOWR_32DIRECT(base, ALTERA_MSGDMA_CSR_CONTROL_REG, data)
/hal_altera-latest/drivers/altera_epcq_controller/inc/
Daltera_epcq_controller_regs.h54 IOWR_32DIRECT(base, ALTERA_EPCQ_CONTROLLER_STATUS_REG, data)
90 IOWR_32DIRECT(base, ALTERA_EPCQ_CONTROLLER_SID_REG, data)
125 IOWR_32DIRECT(base, ALTERA_EPCQ_CONTROLLER_RDID_REG, data)
161 IOWR_32DIRECT(base, ALTERA_EPCQ_CONTROLLER_MEM_OP_REG, data)
193 IOWR_32DIRECT(base, ALTERA_EPCQ_CONTROLLER_ISR_REG, data)
224 IOWR_32DIRECT(base, ALTERA_EPCQ_CONTROLLER_IMR_REG, data)
249 IOWR_32DIRECT(base, ALTERA_EPCQ_CHIP_SELECT_REG, data)
/hal_altera-latest/drivers/altera_generic_qspi_controller2/inc/
Daltera_generic_quad_spi_controller2_regs.h54 IOWR_32DIRECT(base, ALTERA_QSPI_CONTROLLER2_STATUS_REG, data)
90 IOWR_32DIRECT(base, ALTERA_QSPI_CONTROLLER2_SID_REG, data)
125 IOWR_32DIRECT(base, ALTERA_QSPI_CONTROLLER2_RDID_REG, data)
161 IOWR_32DIRECT(base, ALTERA_QSPI_CONTROLLER2_MEM_OP_REG, data)
193 IOWR_32DIRECT(base, ALTERA_QSPI_CONTROLLER2_ISR_REG, data)
224 IOWR_32DIRECT(base, ALTERA_QSPI_CONTROLLER2_IMR_REG, data)
249 IOWR_32DIRECT(base, ALTERA_QSPI_CHIP_SELECT_REG, data)
/hal_altera-latest/include/
Dio.h58 #define IOWR_32DIRECT(BASE, OFFSET, DATA) \ macro
/hal_altera-latest/drivers/altera_generic_qspi_controller2/HAL/src/
Daltera_generic_quad_spi_controller2.c610 IOWR_32DIRECT(qspi_flash_info->data_base, write_offset, word_to_write); in alt_qspi_controller2_write_block()
/hal_altera-latest/drivers/altera_epcq_controller/HAL/src/
Daltera_epcq_controller.c340 IOWR_32DIRECT(epcq_flash_info->data_base, write_offset, word_to_write); in alt_epcq_controller_write_block()