| /hal_adi-latest/MAX/Libraries/PeriphDrivers/Source/SPI/ |
| D | spi_reva2.c | 198 int8_t spi_num; in MXC_SPI_RevA2_process() local 201 spi_num = MXC_SPI_GET_IDX((mxc_spi_regs_t *)spi); in MXC_SPI_RevA2_process() 205 if (STATES[spi_num].tx_buffer && STATES[spi_num].tx_length_bytes > 0) { in MXC_SPI_RevA2_process() 207 if (STATES[spi_num].frame_size <= 8) { in MXC_SPI_RevA2_process() 211 if (STATES[spi_num].tx_count_bytes == STATES[spi_num].tx_length_bytes) { in MXC_SPI_RevA2_process() 215 spi->fifo8[0] = STATES[spi_num].tx_buffer[STATES[spi_num].tx_count_bytes]; in MXC_SPI_RevA2_process() 216 STATES[spi_num].tx_count_bytes += 1; in MXC_SPI_RevA2_process() 221 STATES[spi_num].tx_count_bytes += MXC_SPI_RevA2_writeTXFIFO16( in MXC_SPI_RevA2_process() 222 spi, &(STATES[spi_num].tx_buffer[STATES[spi_num].tx_count_bytes]), in MXC_SPI_RevA2_process() 223 STATES[spi_num].tx_length_bytes - STATES[spi_num].tx_count_bytes); in MXC_SPI_RevA2_process() [all …]
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| D | spi_reva1.c | 62 int spi_num = MXC_SPI_GET_IDX((mxc_spi_regs_t *)spi); in MXC_SPI_RevA1_Init() local 68 if (spi_num < 0) in MXC_SPI_RevA1_Init() 71 states[spi_num].req = NULL; in MXC_SPI_RevA1_Init() 72 states[spi_num].last_size = 0; in MXC_SPI_RevA1_Init() 73 states[spi_num].ssDeassert = 1; in MXC_SPI_RevA1_Init() 74 states[spi_num].defaultTXData = 0; in MXC_SPI_RevA1_Init() 75 states[spi_num].mtMode = 0; in MXC_SPI_RevA1_Init() 76 states[spi_num].mtFirstTrans = 0; in MXC_SPI_RevA1_Init() 77 states[spi_num].channelTx = E_NO_DEVICE; in MXC_SPI_RevA1_Init() 78 states[spi_num].channelRx = E_NO_DEVICE; in MXC_SPI_RevA1_Init() [all …]
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| D | spi_es17.c | 36 int spi_num; in MXC_SPI_Init() local 38 spi_num = MXC_SPI_GET_IDX(spi); in MXC_SPI_Init() 39 MXC_ASSERT(spi_num >= 0); in MXC_SPI_Init() 69 int spi_num; in MXC_SPI_Shutdown() local 70 spi_num = MXC_SPI_GET_IDX(spi); in MXC_SPI_Shutdown() 71 MXC_ASSERT(spi_num >= 0); in MXC_SPI_Shutdown() 250 int spi_num; in MXC_SPI_MasterTransactionDMA() local 252 spi_num = MXC_SPI_GET_IDX(req->spi); in MXC_SPI_MasterTransactionDMA() 253 MXC_ASSERT(spi_num >= 0); in MXC_SPI_MasterTransactionDMA() 256 switch (spi_num) { in MXC_SPI_MasterTransactionDMA() [all …]
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| D | spi_me11.c | 36 int spi_num; in MXC_SPI_Init() local 38 spi_num = MXC_SPI_GET_IDX(spi); in MXC_SPI_Init() 39 MXC_ASSERT(spi_num >= 0); in MXC_SPI_Init() 68 int spi_num; in MXC_SPI_Shutdown() local 69 spi_num = MXC_SPI_GET_IDX(spi); in MXC_SPI_Shutdown() 70 MXC_ASSERT(spi_num >= 0); in MXC_SPI_Shutdown() 248 int spi_num; in MXC_SPI_MasterTransactionDMA() local 250 spi_num = MXC_SPI_GET_IDX(req->spi); in MXC_SPI_MasterTransactionDMA() 251 MXC_ASSERT(spi_num >= 0); in MXC_SPI_MasterTransactionDMA() 254 switch (spi_num) { in MXC_SPI_MasterTransactionDMA() [all …]
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| D | spi_me16.c | 37 uint8_t spi_num; in MXC_SPI_Init() local 39 spi_num = MXC_SPI_GET_IDX(spi); in MXC_SPI_Init() 40 MXC_ASSERT(spi_num >= 0); in MXC_SPI_Init() 75 int spi_num; in MXC_SPI_Shutdown() local 76 spi_num = MXC_SPI_GET_IDX(spi); in MXC_SPI_Shutdown() 77 MXC_ASSERT(spi_num >= 0); in MXC_SPI_Shutdown() 258 int spi_num; in MXC_SPI_MasterTransactionDMA() local 260 spi_num = MXC_SPI_GET_IDX(req->spi); in MXC_SPI_MasterTransactionDMA() 261 MXC_ASSERT(spi_num >= 0); in MXC_SPI_MasterTransactionDMA() 264 switch (spi_num) { in MXC_SPI_MasterTransactionDMA() [all …]
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| D | spi_me15.c | 37 int spi_num; in MXC_SPI_Init() local 39 spi_num = MXC_SPI_GET_IDX(spi); in MXC_SPI_Init() 40 MXC_ASSERT(spi_num >= 0); in MXC_SPI_Init() 78 int spi_num; in MXC_SPI_Shutdown() local 79 spi_num = MXC_SPI_GET_IDX(spi); in MXC_SPI_Shutdown() 80 MXC_ASSERT(spi_num >= 0); in MXC_SPI_Shutdown() 262 int spi_num; in MXC_SPI_MasterTransactionDMA() local 264 spi_num = MXC_SPI_GET_IDX(req->spi); in MXC_SPI_MasterTransactionDMA() 265 MXC_ASSERT(spi_num >= 0); in MXC_SPI_MasterTransactionDMA() 268 switch (spi_num) { in MXC_SPI_MasterTransactionDMA() [all …]
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| D | spi_me12.c | 40 int spi_num; in MXC_SPI_Init() local 42 spi_num = MXC_SPI_GET_IDX(spi); in MXC_SPI_Init() 43 MXC_ASSERT(spi_num >= 0); in MXC_SPI_Init() 50 if ((spi_num == 0) && (hz > PeripheralClock)) { in MXC_SPI_Init() 54 if ((spi_num == 1) && (hz > SystemCoreClock)) { in MXC_SPI_Init() 153 int spi_num; in MXC_SPI_Shutdown() local 154 spi_num = MXC_SPI_GET_IDX(spi); in MXC_SPI_Shutdown() 155 MXC_ASSERT(spi_num >= 0); in MXC_SPI_Shutdown() 156 (void)spi_num; in MXC_SPI_Shutdown() 357 int spi_num; in MXC_SPI_MasterTransactionDMA() local [all …]
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| D | spi_me17.c | 40 int spi_num; in MXC_SPI_Init() local 42 spi_num = MXC_SPI_GET_IDX(spi); in MXC_SPI_Init() 43 MXC_ASSERT(spi_num >= 0); in MXC_SPI_Init() 50 if ((spi_num == 0) && (hz > PeripheralClock)) { in MXC_SPI_Init() 54 if ((spi_num == 1) && (hz > SystemCoreClock)) { in MXC_SPI_Init() 183 int spi_num; in MXC_SPI_Shutdown() local 184 spi_num = MXC_SPI_GET_IDX(spi); in MXC_SPI_Shutdown() 185 MXC_ASSERT(spi_num >= 0); in MXC_SPI_Shutdown() 186 (void)spi_num; in MXC_SPI_Shutdown() 415 int spi_num; in MXC_SPI_MasterTransactionDMA() local [all …]
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| D | spi_me18.c | 40 int spi_num; in MXC_SPI_Init() local 42 spi_num = MXC_SPI_GET_IDX(spi); in MXC_SPI_Init() 43 MXC_ASSERT(spi_num >= 0); in MXC_SPI_Init() 50 if ((spi_num < 3) && (hz > PeripheralClock)) { in MXC_SPI_Init() 54 if ((spi_num > 2) && (hz > SystemCoreClock)) { in MXC_SPI_Init() 160 int spi_num; in MXC_SPI_Shutdown() local 161 spi_num = MXC_SPI_GET_IDX(spi); in MXC_SPI_Shutdown() 162 MXC_ASSERT(spi_num >= 0); in MXC_SPI_Shutdown() 163 (void)spi_num; in MXC_SPI_Shutdown() 381 int spi_num; in MXC_SPI_MasterTransactionDMA() local [all …]
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| D | spi_me13.c | 36 int spi_num; in MXC_SPI_Init() local 38 spi_num = MXC_SPI_GET_IDX(spi); in MXC_SPI_Init() 39 MXC_ASSERT(spi_num >= 0); in MXC_SPI_Init() 77 int spi_num; in MXC_SPI_Shutdown() local 78 spi_num = MXC_SPI_GET_IDX(spi); in MXC_SPI_Shutdown() 79 MXC_ASSERT(spi_num >= 0); in MXC_SPI_Shutdown() 282 int spi_num; in MXC_SPI_MasterTransactionDMA() local 283 spi_num = MXC_SPI_GET_IDX(req->spi); in MXC_SPI_MasterTransactionDMA() 284 MXC_ASSERT(spi_num >= 0); in MXC_SPI_MasterTransactionDMA() 287 switch (spi_num) { in MXC_SPI_MasterTransactionDMA() [all …]
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| D | spi_me21.c | 36 int spi_num; in MXC_SPI_Init() local 38 spi_num = MXC_SPI_GET_IDX(spi); in MXC_SPI_Init() 39 MXC_ASSERT(spi_num >= 0); in MXC_SPI_Init() 95 int spi_num; in MXC_SPI_Shutdown() local 96 spi_num = MXC_SPI_GET_IDX(spi); in MXC_SPI_Shutdown() 97 MXC_ASSERT(spi_num >= 0); in MXC_SPI_Shutdown() 279 int spi_num; in MXC_SPI_MasterTransactionDMA() local 281 spi_num = MXC_SPI_GET_IDX(req->spi); in MXC_SPI_MasterTransactionDMA() 282 MXC_ASSERT(spi_num >= 0); in MXC_SPI_MasterTransactionDMA() 285 switch (spi_num) { in MXC_SPI_MasterTransactionDMA() [all …]
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| D | spi_me55.c | 36 int spi_num; in MXC_SPI_Init() local 38 spi_num = MXC_SPI_GET_IDX(spi); in MXC_SPI_Init() 39 MXC_ASSERT(spi_num >= 0); in MXC_SPI_Init() 75 int spi_num; in MXC_SPI_Shutdown() local 76 spi_num = MXC_SPI_GET_IDX(spi); in MXC_SPI_Shutdown() 77 MXC_ASSERT(spi_num >= 0); in MXC_SPI_Shutdown() 278 int spi_num; in MXC_SPI_MasterTransactionDMA() local 279 spi_num = MXC_SPI_GET_IDX(req->spi); in MXC_SPI_MasterTransactionDMA() 280 MXC_ASSERT(spi_num >= 0); in MXC_SPI_MasterTransactionDMA() 283 switch (spi_num) { in MXC_SPI_MasterTransactionDMA() [all …]
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| D | spi_me14.c | 36 int spi_num; in MXC_SPI_Init() local 38 spi_num = MXC_SPI_GET_IDX(spi); in MXC_SPI_Init() 39 (void)spi_num; in MXC_SPI_Init() 40 MXC_ASSERT(spi_num >= 0); in MXC_SPI_Init() 141 int spi_num; in MXC_SPI_Shutdown() local 142 spi_num = MXC_SPI_GET_IDX(spi); in MXC_SPI_Shutdown() 143 (void)spi_num; in MXC_SPI_Shutdown() 144 MXC_ASSERT(spi_num >= 0); in MXC_SPI_Shutdown() 342 int spi_num; in MXC_SPI_MasterTransactionDMA() local 348 spi_num = MXC_SPI_GET_IDX(req->spi); in MXC_SPI_MasterTransactionDMA() [all …]
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| D | spi_ai87.c | 40 int spi_num; in MXC_SPI_Init() local 49 spi_num = MXC_SPI_GET_IDX(spi); in MXC_SPI_Init() 50 MXC_ASSERT(spi_num >= 0); in MXC_SPI_Init() 57 if ((spi_num == 0) && (hz > PeripheralClock)) { in MXC_SPI_Init() 61 if ((spi_num == 1) && (hz > SystemCoreClock)) { in MXC_SPI_Init() 184 int spi_num; in MXC_SPI_Shutdown() local 185 spi_num = MXC_SPI_GET_IDX(spi); in MXC_SPI_Shutdown() 186 MXC_ASSERT(spi_num >= 0); in MXC_SPI_Shutdown() 187 (void)spi_num; in MXC_SPI_Shutdown() 401 int spi_num; in MXC_SPI_MasterTransactionDMA() local [all …]
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| D | spi_me55_v2.c | 64 int8_t spi_num; in MXC_SPI_Init() local 70 spi_num = MXC_SPI_GET_IDX(spi); in MXC_SPI_Init() 71 if (spi_num < 0 || spi_num >= MXC_SPI_INSTANCES) { in MXC_SPI_Init() 76 if ((spi_num == 0) && (freq > MXC_SPI_GetPeripheralClock(spi))) { in MXC_SPI_Init() 80 if ((spi_num == 1) && (freq > SystemCoreClock)) { in MXC_SPI_Init() 341 int8_t spi_num; in MXC_SPI_Shutdown() local 343 spi_num = MXC_SPI_GET_IDX(spi); in MXC_SPI_Shutdown() 344 if (spi_num < 0 || spi_num >= MXC_SPI_INSTANCES) { in MXC_SPI_Shutdown() 539 int8_t spi_num; in MXC_SPI_DMA_SetRequestSelect() local 543 spi_num = MXC_SPI_GET_IDX(spi); in MXC_SPI_DMA_SetRequestSelect() [all …]
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| D | spi_ai87_v2.c | 50 int8_t spi_num; in MXC_SPI_Init() local 56 spi_num = MXC_SPI_GET_IDX(spi); in MXC_SPI_Init() 57 if (spi_num < 0 || spi_num >= MXC_SPI_INSTANCES) { in MXC_SPI_Init() 62 if ((spi_num == 0) && (freq > MXC_SPI_GetPeripheralClock(spi))) { in MXC_SPI_Init() 66 if ((spi_num == 1) && (freq > SystemCoreClock)) { in MXC_SPI_Init() 244 int8_t spi_num; in MXC_SPI_Shutdown() local 246 spi_num = MXC_SPI_GET_IDX(spi); in MXC_SPI_Shutdown() 247 if (spi_num < 0 || spi_num >= MXC_SPI_INSTANCES) { in MXC_SPI_Shutdown() 473 int8_t spi_num; in MXC_SPI_DMA_SetRequestSelect() local 477 spi_num = MXC_SPI_GET_IDX(spi); in MXC_SPI_DMA_SetRequestSelect() [all …]
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| D | spi_me10.c | 167 int spi_num = MXC_SPI_GET_IDX((mxc_spi_regs_t *)spi); in MXC_SPI_GetSlave() local 168 MXC_ASSERT(spi_num >= 0); in MXC_SPI_GetSlave()
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| /hal_adi-latest/MAX/Libraries/PeriphDrivers/Source/SPIMSS/ |
| D | spimss_reva.c | 69 int spi_num; in MXC_SPIMSS_RevA_Init() local 73 spi_num = MXC_SPIMSS_GET_IDX((mxc_spimss_regs_t *)spi); in MXC_SPIMSS_RevA_Init() 74 states[spi_num].req = NULL; in MXC_SPIMSS_RevA_Init() 75 states[spi_num].channelTx = -1; in MXC_SPIMSS_RevA_Init() 76 states[spi_num].channelRx = -1; in MXC_SPIMSS_RevA_Init() 77 states[spi_num].auto_dma_handlers = false; in MXC_SPIMSS_RevA_Init() 78 states[spi_num].spi = spi; in MXC_SPIMSS_RevA_Init() 103 int spi_num; in MXC_SPIMSS_RevA_Shutdown() local 115 spi_num = MXC_SPIMSS_GET_IDX((mxc_spimss_regs_t *)spi); in MXC_SPIMSS_RevA_Shutdown() 116 if (states[spi_num].req != NULL) { in MXC_SPIMSS_RevA_Shutdown() [all …]
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| D | spimss_me11.c | 37 int spi_num; in MXC_SPIMSS_Init() local 39 spi_num = MXC_SPIMSS_GET_IDX(spi); in MXC_SPIMSS_Init() 41 MXC_ASSERT(spi_num >= 0); in MXC_SPIMSS_Init() 73 int spi_num; in MXC_SPIMSS_Shutdown() local 74 spi_num = MXC_SPIMSS_GET_IDX(spi); in MXC_SPIMSS_Shutdown() 75 MXC_ASSERT(spi_num >= 0); in MXC_SPIMSS_Shutdown()
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