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Searched refs:lp_ctrl (Results 1 – 3 of 3) sorted by relevance

/hal_adi-latest/MAX/Libraries/PeriphDrivers/Source/LP/
Dlp_me11.c207 if (MXC_PWRSEQ->lp_ctrl & MXC_F_PWRSEQ_LP_CTRL_LDO_DIS) { in MXC_LP_SetOperatingVoltage()
225 MXC_PWRSEQ->lp_ctrl &= ~(MXC_F_PWRSEQ_LP_CTRL_OVR); in MXC_LP_SetOperatingVoltage()
226 MXC_PWRSEQ->lp_ctrl |= ovr; in MXC_LP_SetOperatingVoltage()
293 MXC_PWRSEQ->lp_ctrl |= MXC_F_PWRSEQ_LP_CTRL_RAMRET_SEL0; in MXC_LP_EnableSRamRet0()
298 MXC_PWRSEQ->lp_ctrl &= ~MXC_F_PWRSEQ_LP_CTRL_RAMRET_SEL0; in MXC_LP_DisableSRamRet0()
303 MXC_PWRSEQ->lp_ctrl |= MXC_F_PWRSEQ_LP_CTRL_RAMRET_SEL1; in MXC_LP_EnableSRamRet1()
308 MXC_PWRSEQ->lp_ctrl &= ~MXC_F_PWRSEQ_LP_CTRL_RAMRET_SEL1; in MXC_LP_DisableSRamRet1()
313 MXC_PWRSEQ->lp_ctrl |= MXC_F_PWRSEQ_LP_CTRL_RAMRET_SEL2; in MXC_LP_EnableSRamRet2()
318 MXC_PWRSEQ->lp_ctrl &= ~MXC_F_PWRSEQ_LP_CTRL_RAMRET_SEL2; in MXC_LP_DisableSRamRet2()
323 MXC_PWRSEQ->lp_ctrl |= MXC_F_PWRSEQ_LP_CTRL_RAMRET_SEL3; in MXC_LP_EnableSRamRet3()
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/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32660/Source/
Dsystem_max32660.c67 ovr = (MXC_PWRSEQ->lp_ctrl & MXC_F_PWRSEQ_LP_CTRL_OVR); in SystemCoreClockUpdate()
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32660/Include/
Dpwrseq_regs.h77 __IO uint32_t lp_ctrl; /**< <tt>\b 0x00:</tt> PWRSEQ LP_CTRL Register */ member