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Searched refs:clk_src (Results 1 – 25 of 30) sorted by relevance

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/hal_adi-latest/MAX/Include/
Dwrap_max32_wdt.h127 mxc_wdt_clock_t clk_src; in Wrap_MXC_WDT_SelectClockSource() local
131 clk_src = MXC_WDT_PCLK; in Wrap_MXC_WDT_SelectClockSource()
134 clk_src = MXC_WDT_IBRO_CLK; in Wrap_MXC_WDT_SelectClockSource()
138 clk_src = MXC_WDT_NANO_CLK; in Wrap_MXC_WDT_SelectClockSource()
140 clk_src = MXC_WDT_INRO_CLK; in Wrap_MXC_WDT_SelectClockSource()
145 clk_src = MXC_WDT_ERTCO_CLK; in Wrap_MXC_WDT_SelectClockSource()
152 return MXC_WDT_SetClockSource(wdt, clk_src); in Wrap_MXC_WDT_SelectClockSource()
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32650/Source/
Dsystem_max32650.c53 uint32_t base_freq, div, clk_src; in SystemCoreClockUpdate() local
56 clk_src = (MXC_GCR->clk_ctrl & MXC_F_GCR_CLK_CTRL_SYSOSC_SEL); in SystemCoreClockUpdate()
57 if (clk_src == MXC_S_GCR_CLK_CTRL_SYSOSC_SEL_HFXIN) { in SystemCoreClockUpdate()
59 } else if (clk_src == MXC_S_GCR_CLK_CTRL_SYSOSC_SEL_NANORING) { in SystemCoreClockUpdate()
61 } else if (clk_src == MXC_S_GCR_CLK_CTRL_SYSOSC_SEL_HIRC96) { in SystemCoreClockUpdate()
63 } else if (clk_src == MXC_S_GCR_CLK_CTRL_SYSOSC_SEL_HIRC8) { in SystemCoreClockUpdate()
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32670/Source/
Dsystem_max32670.c52 uint32_t base_freq, div, clk_src; in SystemCoreClockUpdate() local
55 clk_src = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL); in SystemCoreClockUpdate()
56 switch (clk_src) { in SystemCoreClockUpdate()
82 if (clk_src == MXC_S_GCR_CLKCTRL_SYSCLK_SEL_IPO) { in SystemCoreClockUpdate()
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32662/Source/
Dsystem_max32662.c54 uint32_t base_freq, div, clk_src; in SystemCoreClockUpdate() local
57 clk_src = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL); in SystemCoreClockUpdate()
58 switch (clk_src) { in SystemCoreClockUpdate()
84 if (clk_src == MXC_S_GCR_CLKCTRL_SYSCLK_SEL_IPO) { in SystemCoreClockUpdate()
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32672/Source/
Dsystem_max32672.c50 uint32_t base_freq, div, clk_src; in SystemCoreClockUpdate() local
53 clk_src = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL); in SystemCoreClockUpdate()
54 switch (clk_src) { in SystemCoreClockUpdate()
80 if (clk_src == MXC_S_GCR_CLKCTRL_SYSCLK_SEL_IPO) { in SystemCoreClockUpdate()
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32660/Source/
Dsystem_max32660.c56 uint32_t base_freq, div, clk_src, ovr; in SystemCoreClockUpdate() local
59 clk_src = (MXC_GCR->clk_ctrl & MXC_F_GCR_CLK_CTRL_CLKSEL); in SystemCoreClockUpdate()
61 if (clk_src == MXC_S_GCR_CLK_CTRL_CLKSEL_HFXIN) { in SystemCoreClockUpdate()
64 if (clk_src == MXC_S_GCR_CLK_CTRL_CLKSEL_NANORING) { in SystemCoreClockUpdate()
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32675/Source/
Dsystem_max32675.c52 uint32_t base_freq, div, clk_src; in SystemCoreClockUpdate() local
55 clk_src = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL); in SystemCoreClockUpdate()
56 switch (clk_src) { in SystemCoreClockUpdate()
82 if (clk_src == MXC_S_GCR_CLKCTRL_SYSCLK_SEL_IPO) { in SystemCoreClockUpdate()
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32690/Source/
Dsystem_riscv_max32690.c48 uint32_t base_freq, div, clk_src; in SystemCoreClockUpdate() local
51 clk_src = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL); in SystemCoreClockUpdate()
52 switch (clk_src) { in SystemCoreClockUpdate()
Dsystem_max32690.c51 uint32_t base_freq, div, clk_src; in SystemCoreClockUpdate() local
54 clk_src = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL); in SystemCoreClockUpdate()
55 switch (clk_src) { in SystemCoreClockUpdate()
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32572/Source/
Dsystem_riscv_max32572.c48 uint32_t base_freq, div, clk_src; in SystemCoreClockUpdate() local
51 clk_src = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL); in SystemCoreClockUpdate()
52 switch (clk_src) { in SystemCoreClockUpdate()
Dsystem_max32572.c51 uint32_t base_freq, div, clk_src; in SystemCoreClockUpdate() local
54 clk_src = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL); in SystemCoreClockUpdate()
55 switch (clk_src) { in SystemCoreClockUpdate()
/hal_adi-latest/MAX/Libraries/PeriphDrivers/Source/I2S/
Di2s_me17.c70 int MXC_I2S_SelectClockSource(mxc_i2s_clksrc_t clk_src, uint32_t freq_ext) in MXC_I2S_SelectClockSource() argument
73 if (clk_src < MXC_I2S_CLKSRC_ERFO || clk_src > MXC_I2S_CLKSRC_EXT) { in MXC_I2S_SelectClockSource()
75 } else if ((MXC_SYS_GetRevision() & 0xB0) != 0xB0 && clk_src == MXC_I2S_CLKSRC_EXT) { in MXC_I2S_SelectClockSource()
81 if (clk_src == MXC_I2S_CLKSRC_EXT) { in MXC_I2S_SelectClockSource()
92 g_i2s_clksrc = clk_src; in MXC_I2S_SelectClockSource()
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX78000/Source/
Dsystem_max78000.c51 uint32_t base_freq, div, clk_src; in SystemCoreClockUpdate() local
54 clk_src = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL); in SystemCoreClockUpdate()
55 switch (clk_src) { in SystemCoreClockUpdate()
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32570/Source/
Dsystem_max32570.c51 uint32_t base_freq, div, clk_src; in SystemCoreClockUpdate() local
54 clk_src = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL); in SystemCoreClockUpdate()
55 switch (clk_src) { in SystemCoreClockUpdate()
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX78002/Source/
Dsystem_max78002.c50 uint32_t base_freq, div, clk_src; in SystemCoreClockUpdate() local
53 clk_src = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL); in SystemCoreClockUpdate()
54 switch (clk_src) { in SystemCoreClockUpdate()
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32520/Source/
Dsystem_max32520.c54 uint32_t base_freq, div, clk_src; in SystemCoreClockUpdate() local
57 clk_src = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL); in SystemCoreClockUpdate()
58 switch (clk_src) { in SystemCoreClockUpdate()
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32680/Source/
Dsystem_max32680.c51 uint32_t base_freq, div, clk_src; in SystemCoreClockUpdate() local
54 clk_src = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL); in SystemCoreClockUpdate()
55 switch (clk_src) { in SystemCoreClockUpdate()
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32655/Source/
Dsystem_max32655.c52 uint32_t base_freq, div, clk_src; in SystemCoreClockUpdate() local
55 clk_src = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL); in SystemCoreClockUpdate()
56 switch (clk_src) { in SystemCoreClockUpdate()
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32665/Source/
Dsystem_max32665.c58 uint32_t base_freq, div, clk_src; in SystemCoreClockUpdate() local
61 clk_src = (MXC_GCR->clkcn & MXC_F_GCR_CLKCN_CLKSEL); in SystemCoreClockUpdate()
62 switch (clk_src) { in SystemCoreClockUpdate()
/hal_adi-latest/MAX/Libraries/PeriphDrivers/Source/TMR/
Dtmr_revb.h41 int MXC_TMR_RevB_Init(mxc_tmr_revb_regs_t *tmr, mxc_tmr_cfg_t *cfg, uint8_t clk_src);
Dtmr_revb.c43 int MXC_TMR_RevB_Init(mxc_tmr_revb_regs_t *tmr, mxc_tmr_cfg_t *cfg, uint8_t clk_src) in MXC_TMR_RevB_Init() argument
68 (clk_src << MXC_F_TMR_CTRL1_CLKSEL_A_POS)); in MXC_TMR_RevB_Init()
73 (clk_src << MXC_F_TMR_CTRL1_CLKSEL_B_POS)); in MXC_TMR_RevB_Init()
/hal_adi-latest/MAX/Libraries/PeriphDrivers/Source/AFE/
Dafe_timer.c181 uint8_t clk_src = 0; in AFE_TMR_Config_16() local
198 status = AFE_TMR_GetClockSrc(cfg->clock, &clk_src); in AFE_TMR_Config_16()
215 tmr->ctrl1 |= ((clk_src << MXC_F_TMR_CTRL0_CLKDIV_A_POS) << timerOffset); in AFE_TMR_Config_16()
/hal_adi-latest/MAX/Libraries/PeriphDrivers/Include/MAX32655/
Di2s.h175 int MXC_I2S_SelectClockSource(mxc_i2s_clksrc_t clk_src, uint32_t freq_ext);
/hal_adi-latest/MAX/Libraries/PeriphDrivers/Source/SPI/
Dspi_me12.c183 uint32_t clk_src = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL) >> in MXC_SPI_GetPeripheralClock() local
185 switch (clk_src) { in MXC_SPI_GetPeripheralClock()
/hal_adi-latest/MAX/Libraries/PeriphDrivers/Source/SYS/
Dsys_me10.c435 int MXC_SYS_SysTick_Config(uint32_t ticks, int clk_src, mxc_tmr_regs_t *tmr) in MXC_SYS_SysTick_Config() argument
441 if (clk_src) { in MXC_SYS_SysTick_Config()

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