1 /** 2 * @file ecc_regs.h 3 * @brief Registers, Bit Masks and Bit Positions for the ECC Peripheral Module. 4 * @deprecated This file is deprecated in favor of @ref trimsir_registers. 5 */ 6 7 /****************************************************************************** 8 * 9 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 10 * Analog Devices, Inc.), 11 * Copyright (C) 2023-2024 Analog Devices, Inc. 12 * 13 * Licensed under the Apache License, Version 2.0 (the "License"); 14 * you may not use this file except in compliance with the License. 15 * You may obtain a copy of the License at 16 * 17 * http://www.apache.org/licenses/LICENSE-2.0 18 * 19 * Unless required by applicable law or agreed to in writing, software 20 * distributed under the License is distributed on an "AS IS" BASIS, 21 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 * See the License for the specific language governing permissions and 23 * limitations under the License. 24 * 25 ******************************************************************************/ 26 27 #ifndef _ECC_REGS_H_ 28 #define _ECC_REGS_H_ 29 30 /* **** Includes **** */ 31 #include <stdint.h> 32 #include <stdio.h> 33 34 #warning "DEPRECATED(10-24-2022): ecc_regs.h - Scheduled for removal. Please use trimsir_regs.h." 35 36 #ifdef __cplusplus 37 extern "C" { 38 #endif 39 40 #if defined (__ICCARM__) 41 #pragma system_include 42 #endif 43 44 #if defined (__CC_ARM) 45 #pragma anon_unions 46 #endif 47 /// @cond 48 /* 49 If types are not defined elsewhere (CMSIS) define them here 50 */ 51 #ifndef __IO 52 #define __IO volatile 53 #endif 54 #ifndef __I 55 #define __I volatile const 56 #endif 57 #ifndef __O 58 #define __O volatile 59 #endif 60 #ifndef __R 61 #define __R volatile const 62 #endif 63 /// @endcond 64 65 /* **** Definitions **** */ 66 67 /** 68 * @ingroup ecc 69 * @defgroup ecc_registers ECC_Registers 70 * @brief Registers, Bit Masks and Bit Positions for the ECC Peripheral Module. 71 * @details Error Correction Code 72 */ 73 74 /** 75 * @ingroup ecc_registers 76 * Structure type to access the ECC Registers. 77 */ 78 #if defined(__GNUC__) 79 __attribute__((deprecated("mxc_ecc_regs_t struct and ecc_regs.h no longer supported. Use trimsir_regs.h and MXC_TRIMSIR (mxc_trimsir_regs_t) for ECC. 10-24-2022"))) 80 #else 81 #warning "mxc_ecc_regs_t struct and ecc_regs.h no longer supported. Use trimsir_regs.h and MXC_TRIMSIR (mxc_trimsir_regs_t) for ECC. 10-24-2022" 82 #endif 83 typedef struct { 84 __R uint32_t rsv_0x0_0x7[2]; 85 __IO uint32_t en; /**< <tt>\b 0x08:</tt> ECC EN Register */ 86 } mxc_ecc_regs_t; 87 88 /* Register offsets for module ECC */ 89 /** 90 * @ingroup ecc_registers 91 * @defgroup ECC_Register_Offsets Register Offsets 92 * @brief ECC Peripheral Register Offsets from the ECC Base Peripheral Address. 93 * @{ 94 */ 95 #define MXC_R_ECC_EN ((uint32_t)0x00000008UL) /**< Offset from ECC Base Address: <tt> 0x0008</tt> */ 96 /**@} end of group ecc_registers */ 97 98 /** 99 * @ingroup ecc_registers 100 * @defgroup ECC_EN ECC_EN 101 * @brief ECC Enable Register 102 * @{ 103 */ 104 #define MXC_F_ECC_EN_RAM0_1_POS MXC_F_TRIMSIR_BB_SIR2_RAM0_1ECCEN_POS /**< EN_RAM0_1 Position */ 105 #define MXC_F_ECC_EN_RAM0_1 MXC_F_TRIMSIR_BB_SIR2_RAM0_1ECCEN /**< EN_RAM0_1 Mask */ 106 107 #define MXC_F_ECC_EN_RAM2_POS MXC_F_TRIMSIR_BB_SIR2_RAM2ECCEN_POS /**< EN_RAM2 Position */ 108 #define MXC_F_ECC_EN_RAM2 MXC_F_TRIMSIR_BB_SIR2_RAM2ECCEN /**< EN_RAM2 Mask */ 109 110 #define MXC_F_ECC_EN_RAM3_POS MXC_F_TRIMSIR_BB_SIR2_RAM3ECCEN_POS /**< EN_RAM3 Position */ 111 #define MXC_F_ECC_EN_RAM3 MXC_F_TRIMSIR_BB_SIR2_RAM3ECCEN /**< EN_RAM3 Mask */ 112 113 #define MXC_F_ECC_EN_ICC0_POS MXC_F_TRIMSIR_BB_SIR2_ICC0ECCEN_POS /**< EN_ICC0 Position */ 114 #define MXC_F_ECC_EN_ICC0 MXC_F_TRIMSIR_BB_SIR2_ICC0ECCEN /**< EN_ICC0 Mask */ 115 116 #define MXC_F_ECC_EN_FL0_POS MXC_F_TRIMSIR_BB_SIR2_FL0ECCEN_POS /**< EN_FL0 Position */ 117 #define MXC_F_ECC_EN_FL0 MXC_F_TRIMSIR_BB_SIR2_FL0ECCEN /**< EN_FL0 Mask */ 118 119 #define MXC_F_ECC_EN_FL1_POS MXC_F_TRIMSIR_BB_SIR2_FL1ECCEN_POS /**< EN_FL1 Position */ 120 #define MXC_F_ECC_EN_FL1 MXC_F_TRIMSIR_BB_SIR2_FL1ECCEN /**< EN_FL1 Mask */ 121 122 /**@} end of group ECC_EN_Register */ 123 124 #ifdef __cplusplus 125 } 126 #endif 127 128 #endif /* _ECC_REGS_H_ */ 129
