Searched refs:code (Results 1 – 25 of 139) sorted by relevance
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| /cmsis_6-latest/CMSIS/Documentation/Doxygen/Core/src/ |
| D | ref_compiler_ctrl.txt | 4 \brief Compiler agnostic \#define symbols for generic C/C++ source code
15 \brief Set to 1 when generating code for Armv6-M architecture
17 The <b>\#define __ARM_ARCH_6M__</b> is set to 1 when generating code for the Armv6-M architecture. …
23 \brief Set to 1 when generating code for Armv7-M architecture
25 The <b>\#define __ARM_ARCH_7M__</b> is set to 1 when generating code for the Armv7-M architecture. …
31 \brief Set to 1 when generating code for Armv7-M architecture with FPU
33 The <b>\#define __ARM_ARCH_7EM__</b> is set to 1 when generating code for the Armv7-M architecture …
43 \brief Set to 1 when generating code for Armv8-M Baseline architecture
45 The <b>\#define __ARM_ARCH_8M_BASE__</b> is set to 1 when generating code for the Armv8-M architect…
52 \brief Set to 1 when generating code for Armv8-M Mainline architecture
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| D | ref_version_ctrl.txt | 4 \brief Version \#define symbols for CMSIS release specific C/C++ source code
11 This allows application code and middleware components to verify the target processor and the CMSIS…
21 \code
66 \code
90 \code
114 \code
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| D | misra.md | 12 - Violated since function-like macros are used to generate more efficient code.
15 - Violated since function-like macros are used to generate more efficient code.
30 - Violated to simplify code logic.
33 - Violated since function-like macros are used to generate more efficient code.
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| D | ref_peripheral.txt | 42 \code
82 \code
90 The registers in the various UARTs can now be referred in the user code as shown below:\n
91 \code
106 \code
121 \code
130 \code
139 \code
172 \code
204 \code
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| D | ref_cm4_simd.txt | 29 \code
40 \code
50 \code
85 \code
112 \code
136 \code
173 \code
203 \code
229 \code
271 \code
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| D | using_tz.md | 10 - does not impose code overhead, cycle overhead or the complexity of a virtualization based solutio…
23 An Armv8-M TrustZone enabled device has restricted access for data, code, and I/O access to trusted…
27 …- **System Start:** after power on or reset, an Armv8-M system starts code execution in the **Secu…
29 …* control can be transferred to **Non-secure state** to execute user code. This code can only call…
31 …- **Firmware callbacks:** code running in the **Secure state** can execute code in the **Non-secur…
39 …code execution in **Non-secure state** in case of timing violations. Also function pointer callbac…
59 The system supports two separate interrupt vector tables for secure and non-secure code execution.
61 This interrupt assignment is controlled during **Secure state** code execution via the NVIC (nested…
77 …re or Non-secure) and mode (handler=exception/interrupt execution or thread=normal code execution).
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| D | ref_systick.txt | 13 The code below shows the usage of the function SysTick_Config() with an LPC1700.
15 \code
29 if (returnCode != 0) { /* Check return code for errors */
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| /cmsis_6-latest/CMSIS/Documentation/Doxygen/Driver/src/ |
| D | VIO.txt | 19 The VIO software component contains two user code templates with different purposes:
29 \code
39 \c CMSIS_VOUT. They help to write code that can be used in testing environments without real hardwa…
40 implementation example shows such code:
43 \code
61 // Add user code here:
62 // <code vioInit output>
67 // </code>
71 // Add user code here:
72 // <code vioInit input>
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| D | NAND_Demo.c | 125 uint32_t code; in WritePage_Seq() local
136 code = ARM_NAND_CODE_SEND_CMD1 | in WritePage_Seq()
146 code |= ARM_NAND_ECC(2) | ARM_NAND_ECC0; in WritePage_Seq()
152 code, // Sequence code in WritePage_Seq()
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| /cmsis_6-latest/CMSIS/Documentation/Doxygen/Core_A/src/ |
| D | ref_compiler_ctrl.txt | 4 \brief Compiler agnostic \#define symbols for generic C/C++ source code
17 \brief Set to 1 when generating code for Armv7-A (Cortex-A7)
19 The \b \#define __ARM_ARCH_7A__ is set to 1 when generating code for the Armv7-A architecture. This…
28 (shown in the code example below).
31 \code
48 Inline functions offer a trade-off between code size and performance. By default, the compiler deci…
49 inline code or not. The \b __INLINE attribute gives the compiler an hint to inline this function.
53 \code
70 …s a static function that may be inlined by the compiler. If the compiler generates inline code for
74 \code
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| D | ref_irq_ctrl.txt | 26 …dlers are defined as weak empty functions by the \ref startup_c_sec "device specific startup code".
35 \code
180 \code
208 \code
232 \code
254 \code
277 \code
303 \code
327 \code
406 \code
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| D | ref_core_ca.txt | 35 \code
59 \code
67 The registers in the various UARTs can now be referred in the user code as shown below:\n
68 \code
83 \code
113 \code
122 \code
131 \code
163 \code
201 \code
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| D | misra.md | 9 - Violated since function-like macros are used to generate more efficient code.
12 - Violated since function-like macros are used to generate more efficient code.
27 - Violated to simplify code logic.
30 - Violated since function-like macros are used to generate more efficient code.
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| /cmsis_6-latest/CMSIS/Documentation/Doxygen/RTOS2/src/ |
| D | ref_cmsis_os2_kernel.txt | 20 \code
107 \code
150 \code
181 \code
211 \code
234 it was locked, \token{0} if it was unlocked), or a negative number representing an error code other…
245 \code
247 // ... critical code
257 it was locked, \token{0} if it was unlocked), or a negative number representing an error code other…
267 \code
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| D | ref_os_tick.txt | 44 \code
86 \code
109 \code
133 \code
152 \code
170 \code
187 \code
206 \code
233 \code
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| D | ref_cmsis_os2_event.txt | 33 \code
38 \code
43 \code
133 \code
159 The function returns the event flags stored in the event control block or an error code (highest bi…
172 \code
192 …a ef_id. The function returns the event flags before clearing or an error code (highest bit is set…
239 The function returns the event flags before clearing or an error code (highest bit is set, refer to…
252 \code
297 \code
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| D | ref_cmsis_os2_mutex.txt | 46 \code
89 \code
142 Using \ref osMutexPrioInherit as shown in the example code we get rid of this situation. Due
164 \code
214 \code
271 \code
282 // handle failure code
305 \code
316 // handle failure code
351 \code
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| D | ref_cmsis_os2_thread_flags.txt | 17 The following (incomplete) code excerpt sketches the usage principals for <b>Thread Flags</b>.
33 \code
67 the flags stored in the thread control block, or an error code if highest bit is set (refer to \ref…
81 \code
143 flags before clearing, or an error code if highest bit is set (refer to \ref flags_error_codes).
181 The function returns the flags before clearing, or an error code if highest bit is set (refer to \r…
192 \code
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| /cmsis_6-latest/CMSIS/CoreValidation/Layer/Target/CA9/RTE/Device/ARMCA9/ |
| D | ARMCA9.sct | 8 ; This scatter-file places application code, data, stack and heap at suitable addresses in the memo…
18 * (RESET, +FIRST) ; Vector table and other startup code
19 * (InRoot$$Sections) ; All (library) code that must be in a root region
20 * (+RO-CODE) ; Application RO code (.text)
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| D | ARMCA9_ac6.sct | 6 * (RESET, +FIRST) ; Vector table and other startup code
7 * (InRoot$$Sections) ; All (library) code that must be in a root region
8 * (+RO-CODE) ; Application RO code (.text)
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| /cmsis_6-latest/CMSIS/CoreValidation/Layer/Target/CA7/RTE/Device/ARMCA7/ |
| D | ARMCA7.sct | 8 ; This scatter-file places application code, data, stack and heap at suitable addresses in the memo…
18 * (RESET, +FIRST) ; Vector table and other startup code
19 * (InRoot$$Sections) ; All (library) code that must be in a root region
20 * (+RO-CODE) ; Application RO code (.text)
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| D | ARMCA7_ac6.sct | 6 * (RESET, +FIRST) ; Vector table and other startup code
7 * (InRoot$$Sections) ; All (library) code that must be in a root region
8 * (+RO-CODE) ; Application RO code (.text)
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| /cmsis_6-latest/CMSIS/Core/Template/Device_A/Config/ |
| D | Device_ac6.sct | 8 ; This scatter-file places application code, data, stack and heap at suitable addresses in the memo…
16 * (RESET, +FIRST) ; Vector table and other startup code
17 * (InRoot$$Sections) ; All (library) code that must be in a root region
18 * (+RO-CODE) ; Application RO code (.text)
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| /cmsis_6-latest/CMSIS/CoreValidation/Layer/Target/CA5/RTE/Device/ARMCA5/ |
| D | ARMCA5_ac6.sct | 6 * (RESET, +FIRST) ; Vector table and other startup code
7 * (InRoot$$Sections) ; All (library) code that must be in a root region
8 * (+RO-CODE) ; Application RO code (.text)
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| /cmsis_6-latest/CMSIS/Documentation/Doxygen/style_template/ |
| D | extra_stylesheet.css | 163 /** code fragments */
164 --code-keyword-color: #008000;
165 --code-type-keyword-color: #604020;
166 --code-flow-keyword-color: #E08000;
167 --code-comment-color: #800000;
168 --code-preprocessor-color: #806020;
169 --code-string-literal-color: #002080;
170 --code-char-literal-color: #008080;
171 --code-vhdl-digit-color: #FF00FF;
172 --code-vhdl-char-color: #000000;
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