Searched refs:__ROM_SIZE (Results 1 – 24 of 24) sorted by relevance
| /cmsis_6-latest/CMSIS/CoreValidation/Layer/Target/CA5/RTE/Device/ARMCA5/ |
| D | ARMCA5_ac6.sct | 2 SDRAM __ROM_BASE __ROM_SIZE ; load region size_region 4 VECTORS __ROM_BASE __ROM_SIZE ; load address = execution address
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| D | mem_ARMCA5.h | 47 #define __ROM_SIZE 0x00200000 macro
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| D | mmu_ARMCA5.c | 171 …MMU_TTSection (TTB_BASE, __ROM_BASE, __ROM_SIZE/0x100000, Sect_Normal_Cod); // multiple of 1MB sec… in MMU_CreateTranslationTable()
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| D | ARMCA5_gcc.ld | 4 ROM (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
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| D | ARMCA5_clang.ld | 47 ROM0 (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
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| /cmsis_6-latest/CMSIS/CoreValidation/Layer/Target/CA9/RTE/Device/ARMCA9/ |
| D | ARMCA9_ac6.sct | 2 SDRAM __ROM_BASE __ROM_SIZE ; load region size_region 4 VECTORS __ROM_BASE __ROM_SIZE ; load address = execution address
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| D | ARMCA9.sct | 14 SDRAM __ROM_BASE __ROM_SIZE ; load region size_region 16 VECTORS __ROM_BASE __ROM_SIZE ; load address = execution address
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| D | mem_ARMCA9.h | 47 #define __ROM_SIZE 0x00200000 macro
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| D | mmu_ARMCA9.c | 171 …MMU_TTSection (TTB_BASE, __ROM_BASE, __ROM_SIZE/0x100000, Sect_Normal_Cod); // multiple of 1MB sec… in MMU_CreateTranslationTable()
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| D | ARMCA9_gcc.ld | 4 ROM (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
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| D | ARMCA9.ld | 5 ROM (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
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| D | ARMCA9_clang.ld | 47 ROM0 (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
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| /cmsis_6-latest/CMSIS/CoreValidation/Layer/Target/CA7/RTE/Device/ARMCA7/ |
| D | ARMCA7_ac6.sct | 2 SDRAM __ROM_BASE __ROM_SIZE ; load region size_region 4 VECTORS __ROM_BASE __ROM_SIZE ; load address = execution address
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| D | ARMCA7.sct | 14 SDRAM __ROM_BASE __ROM_SIZE ; load region size_region 16 VECTORS __ROM_BASE __ROM_SIZE ; load address = execution address
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| D | mem_ARMCA7.h | 47 #define __ROM_SIZE 0x00200000 macro
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| D | mmu_ARMCA7.c | 171 …MMU_TTSection (TTB_BASE, __ROM_BASE, __ROM_SIZE/0x100000, Sect_Normal_Cod); // multiple of 1MB sec… in MMU_CreateTranslationTable()
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| D | ARMCA7.ld | 5 ROM (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
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| D | ARMCA7_gcc.ld | 4 ROM (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
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| D | ARMCA7_clang.ld | 47 ROM0 (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
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| /cmsis_6-latest/CMSIS/Core/Template/Device_A/Config/ |
| D | Device_ac6.sct | 12 SDRAM __ROM_BASE __ROM_SIZE ; load region size_region 14 VECTORS __ROM_BASE __ROM_SIZE ; load address = execution address
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| D | mem_Device.h | 43 #define __ROM_SIZE 0x00200000 macro
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| /cmsis_6-latest/CMSIS/CoreValidation/Layer/Target/CM3/RTE/Device/ARMCM3/ |
| D | ARMCM3_gcc.ld | 36 __ROM_SIZE = 0x00040000; symbol 62 FLASH (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
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| /cmsis_6-latest/CMSIS/Core/Template/Device_M/Config/ |
| D | Device_gcc.ld | 36 __ROM_SIZE = 0x00040000; symbol 68 FLASH (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
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| /cmsis_6-latest/CMSIS/Documentation/Doxygen/Core/src/ |
| D | core_linker_sct.md | 24 #define __ROM_SIZE 0x00080000
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