Searched refs:__SCB_DCACHE_LINE_SIZE (Results 1 – 2 of 2) sorted by relevance
45 #ifndef __SCB_DCACHE_LINE_SIZE46 #define __SCB_DCACHE_LINE_SIZE 32U /*!< Cortex-M7 cache line size is fixed to 32 bytes (8 words). … macro332 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_InvalidateDCache_by_Addr()339 op_addr += __SCB_DCACHE_LINE_SIZE; in SCB_InvalidateDCache_by_Addr()340 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_InvalidateDCache_by_Addr()362 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_CleanDCache_by_Addr()369 op_addr += __SCB_DCACHE_LINE_SIZE; in SCB_CleanDCache_by_Addr()370 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanDCache_by_Addr()392 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_CleanInvalidateDCache_by_Addr()399 op_addr += __SCB_DCACHE_LINE_SIZE; in SCB_CleanInvalidateDCache_by_Addr()[all …]
3071 #define __SCB_DCACHE_LINE_SIZE 32U /*!< STAR-MC1 cache line size is fixed to 32 bytes (8 words). S… macro3353 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_InvalidateDCache_by_Addr()3360 op_addr += __SCB_DCACHE_LINE_SIZE; in SCB_InvalidateDCache_by_Addr()3361 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_InvalidateDCache_by_Addr()3383 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_CleanDCache_by_Addr()3390 op_addr += __SCB_DCACHE_LINE_SIZE; in SCB_CleanDCache_by_Addr()3391 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanDCache_by_Addr()3413 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_CleanInvalidateDCache_by_Addr()3420 op_addr += __SCB_DCACHE_LINE_SIZE; in SCB_CleanInvalidateDCache_by_Addr()3421 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanInvalidateDCache_by_Addr()
