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Searched refs:TTB_BASE (Results 1 – 3 of 3) sorted by relevance

/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCA5/
Dmmu_ARMCA5.c106 #define TTB_BASE ((uint32_t*)__TTB_BASE) macro
145 MMU_TTSection (TTB_BASE, 0, 4096, DESCRIPTOR_FAULT); in MMU_CreateTranslationTable()
171 …MMU_TTSection (TTB_BASE, __ROM_BASE, __ROM_SIZE/0x100000, Sect_Normal_Cod); // multiple of 1MB sec… in MMU_CreateTranslationTable()
172 …MMU_TTSection (TTB_BASE, __RAM_BASE, __RAM_SIZE/0x100000, Sect_Normal_RW); // multiple of 1MB sec… in MMU_CreateTranslationTable()
175 MMU_TTSection (TTB_BASE, VE_A5_MP_FLASH_BASE0 , 64, Sect_Device_RO); // 64MB NOR in MMU_CreateTranslationTable()
176 MMU_TTSection (TTB_BASE, VE_A5_MP_FLASH_BASE1 , 64, Sect_Device_RO); // 64MB NOR in MMU_CreateTranslationTable()
177 MMU_TTSection (TTB_BASE, VE_A5_MP_SRAM_BASE , 32, Sect_Device_RW); // 32MB RAM in MMU_CreateTranslationTable()
178 MMU_TTSection (TTB_BASE, VE_A5_MP_VRAM_BASE , 32, Sect_Device_RW); // 32MB RAM in MMU_CreateTranslationTable()
179 MMU_TTSection (TTB_BASE, VE_A5_MP_ETHERNET_BASE , 16, Sect_Device_RW); in MMU_CreateTranslationTable()
180 MMU_TTSection (TTB_BASE, VE_A5_MP_USB_BASE , 16, Sect_Device_RW); in MMU_CreateTranslationTable()
[all …]
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCA7/
Dmmu_ARMCA7.c106 #define TTB_BASE ((uint32_t*)__TTB_BASE) macro
145 MMU_TTSection (TTB_BASE, 0, 4096, DESCRIPTOR_FAULT); in MMU_CreateTranslationTable()
171 …MMU_TTSection (TTB_BASE, __ROM_BASE, __ROM_SIZE/0x100000, Sect_Normal_Cod); // multiple of 1MB sec… in MMU_CreateTranslationTable()
172 …MMU_TTSection (TTB_BASE, __RAM_BASE, __RAM_SIZE/0x100000, Sect_Normal_RW); // multiple of 1MB sec… in MMU_CreateTranslationTable()
175 MMU_TTSection (TTB_BASE, VE_A7_MP_FLASH_BASE0 , 64, Sect_Device_RO); // 64MB NOR in MMU_CreateTranslationTable()
176 MMU_TTSection (TTB_BASE, VE_A7_MP_FLASH_BASE1 , 64, Sect_Device_RO); // 64MB NOR in MMU_CreateTranslationTable()
177 MMU_TTSection (TTB_BASE, VE_A7_MP_SRAM_BASE , 32, Sect_Device_RW); // 32MB RAM in MMU_CreateTranslationTable()
178 MMU_TTSection (TTB_BASE, VE_A7_MP_VRAM_BASE , 32, Sect_Device_RW); // 32MB RAM in MMU_CreateTranslationTable()
179 MMU_TTSection (TTB_BASE, VE_A7_MP_ETHERNET_BASE , 16, Sect_Device_RW); in MMU_CreateTranslationTable()
180 MMU_TTSection (TTB_BASE, VE_A7_MP_USB_BASE , 16, Sect_Device_RW); in MMU_CreateTranslationTable()
[all …]
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCA9/
Dmmu_ARMCA9.c106 #define TTB_BASE ((uint32_t*)__TTB_BASE) macro
145 MMU_TTSection (TTB_BASE, 0, 4096, DESCRIPTOR_FAULT); in MMU_CreateTranslationTable()
171 …MMU_TTSection (TTB_BASE, __ROM_BASE, __ROM_SIZE/0x100000, Sect_Normal_Cod); // multiple of 1MB sec… in MMU_CreateTranslationTable()
172 …MMU_TTSection (TTB_BASE, __RAM_BASE, __RAM_SIZE/0x100000, Sect_Normal_RW); // multiple of 1MB sec… in MMU_CreateTranslationTable()
175 MMU_TTSection (TTB_BASE, VE_A9_MP_FLASH_BASE0 , 64, Sect_Device_RO); // 64MB NOR in MMU_CreateTranslationTable()
176 MMU_TTSection (TTB_BASE, VE_A9_MP_FLASH_BASE1 , 64, Sect_Device_RO); // 64MB NOR in MMU_CreateTranslationTable()
177 MMU_TTSection (TTB_BASE, VE_A9_MP_SRAM_BASE , 32, Sect_Device_RW); // 32MB RAM in MMU_CreateTranslationTable()
178 MMU_TTSection (TTB_BASE, VE_A9_MP_VRAM_BASE , 32, Sect_Device_RW); // 32MB RAM in MMU_CreateTranslationTable()
179 MMU_TTSection (TTB_BASE, VE_A9_MP_ETHERNET_BASE , 16, Sect_Device_RW); in MMU_CreateTranslationTable()
180 MMU_TTSection (TTB_BASE, VE_A9_MP_USB_BASE , 16, Sect_Device_RW); in MMU_CreateTranslationTable()
[all …]