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Searched refs:QSPI_SRAM_SIZE (Results 1 – 4 of 4) sorted by relevance

/cmsis-dsp-latest/Examples/cmsis_build/RTE/Device/SSE-310-MPS3/
Dplatform_base_address.h194 #define QSPI_SRAM_SIZE (0x00800000) /* 8 MB */ macro
209 #define MPC_QSPI_RANGE_LIMIT_NS (QSPI_SRAM_BASE_NS + QSPI_SRAM_SIZE-1)
212 #define MPC_QSPI_RANGE_LIMIT_S (QSPI_SRAM_BASE_S + QSPI_SRAM_SIZE-1)
/cmsis-dsp-latest/Examples/cmsis_build/RTE/Device/SSE-300-MPS3/
Dplatform_base_address.h208 #define QSPI_SRAM_SIZE (0x00800000) /* 8 MB */ macro
223 #define MPC_QSPI_RANGE_LIMIT_NS (QSPI_SRAM_BASE_NS + QSPI_SRAM_SIZE-1)
226 #define MPC_QSPI_RANGE_LIMIT_S (QSPI_SRAM_BASE_S + QSPI_SRAM_SIZE-1)
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/SSE-300-MPS3/
Dplatform_base_address.h198 #define QSPI_SRAM_SIZE (0x00800000) /* 8 MB */ macro
213 #define MPC_QSPI_RANGE_LIMIT_NS (QSPI_SRAM_BASE_NS + QSPI_SRAM_SIZE-1)
216 #define MPC_QSPI_RANGE_LIMIT_S (QSPI_SRAM_BASE_S + QSPI_SRAM_SIZE-1)
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/SSE-310-MPS3/
Dplatform_base_address.h194 #define QSPI_SRAM_SIZE (0x00800000) /* 8 MB */ macro
209 #define MPC_QSPI_RANGE_LIMIT_NS (QSPI_SRAM_BASE_NS + QSPI_SRAM_SIZE-1)
212 #define MPC_QSPI_RANGE_LIMIT_S (QSPI_SRAM_BASE_S + QSPI_SRAM_SIZE-1)