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Searched refs:DDR4_BLK7_BASE_S (Results 1 – 4 of 4) sorted by relevance

/cmsis-dsp-latest/Examples/cmsis_build/RTE/Device/SSE-310-MPS3/
Dplatform_base_address.h180 #define DDR4_BLK7_BASE_S 0xD0000000 /* DDR4 block 7 Secure base address */ macro
253 #define MPC_DDR4_BLK7_RANGE_BASE_S (DDR4_BLK7_BASE_S)
254 #define MPC_DDR4_BLK7_RANGE_LIMIT_S (DDR4_BLK7_BASE_S + ((DDR4_BLK_SIZE)-1))
255 #define MPC_DDR4_BLK7_RANGE_OFFSET_S (DDR4_BLK7_BASE_S - DDR4_BLK0_BASE_NS)
/cmsis-dsp-latest/Examples/cmsis_build/RTE/Device/SSE-300-MPS3/
Dplatform_base_address.h194 #define DDR4_BLK7_BASE_S 0xD0000000 /* DDR4 block 7 Secure base address */ macro
267 #define MPC_DDR4_BLK7_RANGE_BASE_S (DDR4_BLK7_BASE_S)
268 #define MPC_DDR4_BLK7_RANGE_LIMIT_S (DDR4_BLK7_BASE_S + ((DDR4_BLK_SIZE)-1))
269 #define MPC_DDR4_BLK7_RANGE_OFFSET_S (DDR4_BLK7_BASE_S - DDR4_BLK0_BASE_NS)
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/SSE-300-MPS3/
Dplatform_base_address.h184 #define DDR4_BLK7_BASE_S 0xD0000000 /* DDR4 block 7 Secure base address */ macro
257 #define MPC_DDR4_BLK7_RANGE_BASE_S (DDR4_BLK7_BASE_S)
258 #define MPC_DDR4_BLK7_RANGE_LIMIT_S (DDR4_BLK7_BASE_S + ((DDR4_BLK_SIZE)-1))
259 #define MPC_DDR4_BLK7_RANGE_OFFSET_S (DDR4_BLK7_BASE_S - DDR4_BLK0_BASE_NS)
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/SSE-310-MPS3/
Dplatform_base_address.h180 #define DDR4_BLK7_BASE_S 0xD0000000 /* DDR4 block 7 Secure base address */ macro
253 #define MPC_DDR4_BLK7_RANGE_BASE_S (DDR4_BLK7_BASE_S)
254 #define MPC_DDR4_BLK7_RANGE_LIMIT_S (DDR4_BLK7_BASE_S + ((DDR4_BLK_SIZE)-1))
255 #define MPC_DDR4_BLK7_RANGE_OFFSET_S (DDR4_BLK7_BASE_S - DDR4_BLK0_BASE_NS)