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Searched refs:DDR4_BLK1_BASE_S (Results 1 – 5 of 5) sorted by relevance

/cmsis-dsp-latest/Examples/cmsis_build/RTE/Device/SSE-310-MPS3/
Dplatform_base_address.h177 #define DDR4_BLK1_BASE_S 0x70000000 /* DDR4 block 1 Secure base address */ macro
235 #define MPC_DDR4_BLK1_RANGE_BASE_S (DDR4_BLK1_BASE_S)
236 #define MPC_DDR4_BLK1_RANGE_LIMIT_S (DDR4_BLK1_BASE_S + ((DDR4_BLK_SIZE)-1))
237 #define MPC_DDR4_BLK1_RANGE_OFFSET_S (DDR4_BLK1_BASE_S - DDR4_BLK0_BASE_NS)
/cmsis-dsp-latest/Examples/cmsis_build/RTE/Device/SSE-300-MPS3/
Dplatform_base_address.h191 #define DDR4_BLK1_BASE_S 0x70000000 /* DDR4 block 1 Secure base address */ macro
249 #define MPC_DDR4_BLK1_RANGE_BASE_S (DDR4_BLK1_BASE_S)
250 #define MPC_DDR4_BLK1_RANGE_LIMIT_S (DDR4_BLK1_BASE_S + ((DDR4_BLK_SIZE)-1))
251 #define MPC_DDR4_BLK1_RANGE_OFFSET_S (DDR4_BLK1_BASE_S - DDR4_BLK0_BASE_NS)
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/SSE-300-MPS3/
Dplatform_base_address.h181 #define DDR4_BLK1_BASE_S 0x70000000 /* DDR4 block 1 Secure base address */ macro
239 #define MPC_DDR4_BLK1_RANGE_BASE_S (DDR4_BLK1_BASE_S)
240 #define MPC_DDR4_BLK1_RANGE_LIMIT_S (DDR4_BLK1_BASE_S + ((DDR4_BLK_SIZE)-1))
241 #define MPC_DDR4_BLK1_RANGE_OFFSET_S (DDR4_BLK1_BASE_S - DDR4_BLK0_BASE_NS)
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/SSE-310-MPS3/
Dplatform_base_address.h177 #define DDR4_BLK1_BASE_S 0x70000000 /* DDR4 block 1 Secure base address */ macro
235 #define MPC_DDR4_BLK1_RANGE_BASE_S (DDR4_BLK1_BASE_S)
236 #define MPC_DDR4_BLK1_RANGE_LIMIT_S (DDR4_BLK1_BASE_S + ((DDR4_BLK_SIZE)-1))
237 #define MPC_DDR4_BLK1_RANGE_OFFSET_S (DDR4_BLK1_BASE_S - DDR4_BLK0_BASE_NS)
/cmsis-dsp-latest/dsppp/RTE/Device/SSE-300-MPS3/
Dregion_limits.h.base@1.0.038 #define S_DDR4_ALIAS (0x70000000) /* DDR4_BLK1_BASE_S */