Home
last modified time | relevance | path

Searched refs:zero (Results 1 – 24 of 24) sorted by relevance

/cmsis-dsp-3.7.0-3.6.0/Source/ComplexMathFunctions/
Darm_cmplx_conj_f32.c130 float32x4_t zero; in arm_cmplx_conj_f32() local
133 zero = vdupq_n_f32(0.0f); in arm_cmplx_conj_f32()
143 vec.val[1] = vsubq_f32(zero,vec.val[1]); in arm_cmplx_conj_f32()
Darm_cmplx_conj_q31.c63 q31x4_t zero; in arm_cmplx_conj_q31() local
65 zero = vdupq_n_s32(0); in arm_cmplx_conj_q31()
75 vecSrc.val[1] = vqsubq(zero, vecSrc.val[1]); in arm_cmplx_conj_q31()
Darm_cmplx_conj_q15.c63 q15x8_t zero; in arm_cmplx_conj_q15() local
65 zero = vdupq_n_s16(0); in arm_cmplx_conj_q15()
72 vecSrc.val[1] = vqsubq(zero, vecSrc.val[1]); in arm_cmplx_conj_q15()
/cmsis-dsp-3.7.0-3.6.0/Source/MatrixFunctions/
Darm_mat_ldlt_f32.c249 f32x4_t zero=vdupq_n_f32(0.0f); in arm_mat_ldlt_f32() local
255 vstrwq_p(&pl->pData[row*n+col], zero, p0); in arm_mat_ldlt_f32()
266 f32x4_t zero=vdupq_n_f32(0.0f); in arm_mat_ldlt_f32() local
272 vstrwq_p(&pl->pData[row*n+col], zero, p0); in arm_mat_ldlt_f32()
/cmsis-dsp-3.7.0-3.6.0/Examples/cmsis_build/RTE/Device/SSE-310-MPS3/
Dcorstone310_mps3_s.sct28 /* This empty, zero long execution region is here to mark the limit address
50 /* This empty, zero long execution region is here to mark the limit address
/cmsis-dsp-3.7.0-3.6.0/Source/FilteringFunctions/
Darm_biquad_cascade_df1_q15.c89 uint32_t zero = 0; in arm_biquad_cascade_df1_q15() local
91 bCoeffs1 = vshlcq_s16(bCoeffs1, &zero, 16); in arm_biquad_cascade_df1_q15()
94 bCoeffs2 = vshlcq_s16(bCoeffs2, &zero, 16); in arm_biquad_cascade_df1_q15()
97 bCoeffs3 = vshlcq_s16(bCoeffs3, &zero, 16); in arm_biquad_cascade_df1_q15()
Darm_biquad_cascade_df1_q31.c99 uint32_t zero = 0; in arm_biquad_cascade_df1_q31() local
100 b1Coeffs = vshlcq_s32(b1Coeffs, &zero, 32); in arm_biquad_cascade_df1_q31()
/cmsis-dsp-3.7.0-3.6.0/Testing/cmsis_build/RTE/Device/SSE-300-MPS3/
Dfvp_sse300_mps3_s.sct47 /* This empty, zero long execution region is here to mark the limit address
69 /* This empty, zero long execution region is here to mark the limit address
/cmsis-dsp-3.7.0-3.6.0/Testing/cmsis_build/RTE/Device/SSE-310-MPS3/
Dcorstone310_mps3_s.sct47 /* This empty, zero long execution region is here to mark the limit address
69 /* This empty, zero long execution region is here to mark the limit address
Dcorstone310_mps3_s.ld102 * uncomment .zero.table section and,
104 .zero.table :
/cmsis-dsp-3.7.0-3.6.0/Examples/cmsis_build/RTE/Device/SSE-300-MPS3/
Dfvp_sse300_mps3_s.sct47 /* This empty, zero long execution region is here to mark the limit address
69 /* This empty, zero long execution region is here to mark the limit address
/cmsis-dsp-3.7.0-3.6.0/Testing/cmsis_build/RTE/Device/ARMCM0P/
Dgcc_arm.ld169 .zero.table :
259 * to the .zero.table above to asure proper
/cmsis-dsp-3.7.0-3.6.0/Testing/cmsis_build/RTE/Device/ARMCM3/
Dgcc_arm.ld169 .zero.table :
259 * to the .zero.table above to asure proper
/cmsis-dsp-3.7.0-3.6.0/Testing/cmsis_build/RTE/Device/ARMCM4_FP/
Dgcc_arm.ld169 .zero.table :
259 * to the .zero.table above to asure proper
/cmsis-dsp-3.7.0-3.6.0/Testing/cmsis_build/RTE/Device/ARMCM7_DP/
Dgcc_arm.ld169 .zero.table :
259 * to the .zero.table above to asure proper
/cmsis-dsp-3.7.0-3.6.0/Testing/cmsis_build/RTE/Device/ARMCM23/
Dgcc_arm.ld176 .zero.table :
266 * to the .zero.table above to asure proper
/cmsis-dsp-3.7.0-3.6.0/Testing/cmsis_build/RTE/Device/ARMCM33_DSP_FP/
Dgcc_arm.ld176 .zero.table :
266 * to the .zero.table above to asure proper
/cmsis-dsp-3.7.0-3.6.0/Testing/cmsis_build/RTE/Device/ARMCM55/
Dgcc_arm.ld176 .zero.table :
266 * to the .zero.table above to asure proper
/cmsis-dsp-3.7.0-3.6.0/Testing/cmsis_build/RTE/Device/ARMCA9/
DARMCA9.ld72 .zero.table :
/cmsis-dsp-3.7.0-3.6.0/Testing/cmsis_build/RTE/Device/ARMCA5/
DARMCA5.ld72 .zero.table :
/cmsis-dsp-3.7.0-3.6.0/Testing/cmsis_build/RTE/Device/ARMCA7/
DARMCA7.ld72 .zero.table :
/cmsis-dsp-3.7.0-3.6.0/Documentation/Doxygen/
Ddsp.dxy.in358 # When the TOC_INCLUDE_HEADINGS tag is set to a non-zero value, all headings up
875 # at the end of the doxygen process doxygen will return with a non-zero status.
/cmsis-dsp-3.7.0-3.6.0/PythonWrapper/examples/kws_example/
Dkws.ipynb148 …"The feature is based on a simple zero crossing rate (zcr). We choose to only keep the increasing …
/cmsis-dsp-3.7.0-3.6.0/PythonWrapper/examples/
DNoise suppression.ipynb811 " # We pad the signal with zero. It assumes that the padding can be divided by 2.\n",
1119 " # Set noise to zero. In reference code we substract the noise.\n",
1123 " # Not really needed since we set the values to zero. We could\n",
1124 " # just set the output to zero.\n",