Searched refs:write_sysreg (Results 1 – 5 of 5) sorted by relevance
| /Zephyr-latest/soc/brcm/bcmvk/viper/a72/ |
| D | plat_core.c | 27 write_sysreg(reg, CORTEX_A72_L2ACTLR_EL1); in z_arm64_el3_plat_init()
49 write_sysreg(reg, CORTEX_A72_L2CTLR_EL1); in z_arm64_el3_plat_init()
|
| /Zephyr-latest/include/zephyr/arch/arm64/ |
| D | lib_helpers.h | 25 #define write_sysreg(val, reg) \ macro
45 write_sysreg(val, reg); \
|
| /Zephyr-latest/drivers/interrupt_controller/ |
| D | intc_gicv3.c | 301 write_sysreg(intid, ICC_EOIR1_EL1); in arm_gic_eoi()
325 write_sysreg(sgi_val, ICC_SGI1R); in gic_raise_sgi()
456 write_sysreg(icc_sre, ICC_SRE_EL1); in gicv3_cpuif_init()
462 write_sysreg(GIC_IDLE_PRIO, ICC_PMR_EL1); in gicv3_cpuif_init()
465 write_sysreg(1, ICC_IGRPEN1_EL1); in gicv3_cpuif_init()
|
| /Zephyr-latest/include/zephyr/arch/arm/cortex_a_r/ |
| D | lib_helpers.h | 99 #define write_sysreg(val, reg) write_##reg(val) macro
|
| /Zephyr-latest/arch/arm64/core/ |
| D | reset.c | 103 write_sysreg(reg, ICC_SRE_EL3); in z_arm64_el3_init()
|
