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/Zephyr-latest/include/zephyr/arch/xtensa/
Darch_inlines.h46 #define XTENSA_RUR(ur) \ argument
48 __asm__ volatile ("rur." ur " %0" : "=a"(v)); \
57 #define XTENSA_WUR(ur, v) \ argument
59 __asm__ volatile ("wur." ur " %0" : : "r"(v)); \