/Zephyr-latest/include/zephyr/arch/common/ |
D | sys_bitops.h | 38 static ALWAYS_INLINE int sys_test_bit(mem_addr_t addr, unsigned int bit) in sys_test_bit() function 77 return sys_test_bit(addr + ((bit >> 5) << 2), bit & 0x1F); in sys_bitfield_test_bit() 85 ret = sys_test_bit(addr, bit); in sys_test_and_set_bit() 96 ret = sys_test_bit(addr, bit); in sys_test_and_clear_bit()
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/Zephyr-latest/drivers/reset/ |
D | reset_intel_socfpga.c | 52 if (sys_test_bit(base_address + offset, regbit) == 0) { in reset_intel_soc_update() 56 if (sys_test_bit(base_address + offset, regbit) != 0) { in reset_intel_soc_update()
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D | reset_gd32.c | 28 *status = !!sys_test_bit(config->base + GD32_RESET_ID_OFFSET(id), in reset_gd32_status()
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D | reset_numaker.c | 33 *status = !!sys_test_bit(config->base + NUMAKER_RESET_IP_OFFSET(id), in reset_numaker_status()
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D | reset_stm32.c | 27 *status = !!sys_test_bit(config->base + STM32_RESET_SET_OFFSET(id), in reset_stm32_status()
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/Zephyr-latest/tests/kernel/common/src/ |
D | bitfield.c | 52 zassert_true(sys_test_bit((mem_addr_t)&b1, bit), in ZTEST() 58 zassert_false(sys_test_bit((mem_addr_t)&b1, bit), in ZTEST()
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/Zephyr-latest/drivers/gpio/ |
D | gpio_stellaris.c | 82 if (!sys_test_bit((uint32_t)&port_map, pin)) { in gpio_stellaris_configure() 120 if (sys_test_bit(GPIO_REG_ADDR(base, GPIO_DEN_OFFSET), pin) == 0) { in gpio_stellaris_get_config() 122 } else if (sys_test_bit(GPIO_REG_ADDR(base, GPIO_DIR_OFFSET), pin)) { in gpio_stellaris_get_config() 125 if (sys_test_bit(mask_addr, pin)) { in gpio_stellaris_get_config()
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/Zephyr-latest/drivers/ipm/ |
D | ipm_xlnx_ipi.c | 97 if (!sys_test_bit(config->host_ipi_reg + IPI_ISR, remote_ipi_ch_bit)) { in xlnx_mailbox_rx_isr() 141 obs_bit = sys_test_bit(config->host_ipi_reg + IPI_OBS, config->remote_ipi_ch_bit); in xlnx_ipi_send() 178 if (!sys_test_bit(config->host_ipi_reg + IPI_IMR, config->remote_ipi_ch_bit)) { in xlnx_ipi_set_enabled()
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/Zephyr-latest/include/zephyr/arch/x86/ |
D | arch.h | 170 static ALWAYS_INLINE int sys_test_bit(mem_addr_t addr, unsigned int bit) in sys_test_bit() function 210 #define sys_bitfield_test_bit sys_test_bit
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/Zephyr-latest/drivers/pcie/endpoint/ |
D | pcie_ep_iproc_msi.c | 147 is_msix_pending = sys_test_bit(PBA_OFFSET(msix_num), in generate_pending_msix() 196 int msix_table_update = sys_test_bit(PMON_LITE_PCIE_INTERRUPT_STATUS, in iproc_pcie_vector_mask_isr()
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/Zephyr-latest/drivers/i2c/ |
D | i2c_dw.h | 137 #define Z_REG_TEST_BIT sys_test_bit
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/Zephyr-latest/drivers/clock_control/ |
D | clock_control_gd32.c | 193 if (sys_test_bit(config->base + GD32_CLOCK_ID_OFFSET(id), in clock_control_gd32_get_status()
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D | clock_control_npcm.c | 346 while (sys_test_bit(priv->hfcgctrl, NPCM_HFCGCTRL_CLK_CHNG)) in npcm_clock_control_init()
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/Zephyr-latest/drivers/input/ |
D | input_tsc_keys.c | 120 if (sys_test_bit((mem_addr_t)&config->tsc->ISR, TSC_ISR_MCEF_Pos)) { in stm32_tsc_handle_incoming_data() 128 if (sys_test_bit((mem_addr_t)&config->tsc->ISR, TSC_ISR_EOAF_Pos)) { in stm32_tsc_handle_incoming_data()
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/Zephyr-latest/drivers/spi/ |
D | spi_dw.h | 136 return sys_test_bit(addr + off, bit); in reg_test_bit()
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/Zephyr-latest/drivers/dma/ |
D | dma_silabs_siwx91x.c | 334 stat->busy = sys_test_bit((mem_addr_t)&cfg->reg->CHANNEL_STATUS_REG, channel); in siwx91x_dma_get_status()
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D | dma_silabs_ldma.c | 551 if (sys_test_bit((mem_addr_t)&LDMA->CH[channel].LINK, _LDMA_CH_LINK_LINK_SHIFT)) { in silabs_ldma_append_block()
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/Zephyr-latest/drivers/interrupt_controller/ |
D | intc_intel_vtd.c | 77 while (!sys_test_bit((base_address + VTD_GSTS_REG), in vtd_send_cmd()
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D | intc_gicv3.c | 503 __ASSERT(sys_test_bit(GICD_CTLR, GICD_CTRL_NS), in gicv3_dist_init()
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