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Searched refs:s4 (Results 1 – 15 of 15) sorted by relevance

/Zephyr-latest/boards/enjoydigital/litex_vexriscv/doc/img/
Dsymbiflow.svg1 …s4 .8 5.7 2.4c1.6 1.6 2.4 3.5 2.4 5.7s-.8 4-2.4 5.7c-1.6 1.6-3.5 2.4-5.7 2.4s-4-.8-5.7-2.4c-1.6-1.…
/Zephyr-latest/include/zephyr/arch/mips/
Dthread.h38 unsigned long s4; /* saved register */ member
/Zephyr-latest/arch/mips/include/mips/
Dregdef.h46 #define s4 $20 macro
/Zephyr-latest/include/zephyr/arch/riscv/
Dthread.h38 unsigned long s4; /* saved register */ member
/Zephyr-latest/boards/renesas/rcar_spider_s4/
Drcar_spider_s4_r8a779f0_r52.dts15 compatible = "renesas,spider-s4-cr52";
/Zephyr-latest/arch/mips/core/offsets/
Doffsets.c20 GEN_OFFSET_SYM(_callee_saved_t, s4);
/Zephyr-latest/scripts/build/
Dcheck_init_priorities_test.py115 s4 = mock.Mock()
116 s4.name = "__init_APPLICATION_start"
117 s4.entry.st_value = 0x44
127 sts.iter_symbols.return_value = [s0, s1, s2, s3, s4, s5, s6]
/Zephyr-latest/arch/riscv/core/
Dswitch.S23 RV_I( op s4, _thread_offset_to_s4(reg) );\
Dfatal.c136 LOG_ERR(" s4: " PR_REG " s10: " PR_REG, csf->s4, csf->s10); in z_riscv_fatal_error_csf()
Disr.S51 RV_I( sr s4, ___callee_saved_t_s4_OFFSET(sp) );\
/Zephyr-latest/arch/mips/core/
Disr.S27 op s4, THREAD_O(s4)(reg) ;\
/Zephyr-latest/arch/riscv/core/offsets/
Doffsets.c38 GEN_OFFSET_SYM(_callee_saved_t, s4);
/Zephyr-latest/boards/renesas/rcar_spider_s4/doc/
Drcar_spider_r52.rst188 …automotive-products/automotive-system-chips-socs/rtp8a779f0askb0sp2s-r-car-s4-reference-boardspider
191 …https://www.renesas.com/us/en/products/automotive-products/automotive-system-chips-socs/r-car-s4-a…
/Zephyr-latest/dts/arm/nuvoton/npcx/
Dnpcx-espi-vws-map.dtsi42 vw-slp-s4 {
/Zephyr-latest/boards/infineon/cy8ckit_062s4/doc/
Dindex.rst132 …https://www.infineon.com/cms/en/product/evaluation-boards/cy8ckit-062s4/?redirId=VL1508&utm_medium…