Searched refs:rx_desc (Results 1 – 4 of 4) sorted by relevance
208 struct eth_cyclonev_dma_desc *rx_desc; in eth_cyclonev_setup_rxdesc() local212 rx_desc = &p->rx_desc_ring[i]; in eth_cyclonev_setup_rxdesc()213 rx_desc->buffer1_addr = (uint32_t)&p->rx_buf[i * ETH_BUFFER_SIZE]; in eth_cyclonev_setup_rxdesc()214 rx_desc->control_buffer_size = ETH_DMARXDESC_RCH | ETH_BUFFER_SIZE; in eth_cyclonev_setup_rxdesc()217 rx_desc->status = ETH_DMARXDESC_OWN; in eth_cyclonev_setup_rxdesc()219 rx_desc->buffer2_next_desc_addr = (uint32_t)&p->rx_desc_ring[i + 1]; in eth_cyclonev_setup_rxdesc()221 rx_desc->buffer2_next_desc_addr = (uint32_t)&p->rx_desc_ring[0]; in eth_cyclonev_setup_rxdesc()642 struct eth_cyclonev_dma_desc *rx_desc; in eth_cyclonev_receive() local647 rx_desc = &p->rx_desc_ring[index]; in eth_cyclonev_receive()649 while (!(rx_desc->status & ETH_DMARXDESC_OWN)) { in eth_cyclonev_receive()[all …]
1223 struct gmac_desc *rx_desc; in frame_get() local1238 rx_desc = &rx_desc_list->buf[tail]; in frame_get()1240 while ((rx_desc->w0 & GMAC_RXW0_OWNERSHIP) in frame_get()1242 frame_is_complete = (bool)(rx_desc->w1 in frame_get()1245 rx_desc = &rx_desc_list->buf[tail]; in frame_get()1258 rx_desc = &rx_desc_list->buf[tail]; in frame_get()1265 __ASSERT(rx_desc->w1 & GMAC_RXW1_SOF, in frame_get()1272 while ((rx_desc->w0 & GMAC_RXW0_OWNERSHIP) in frame_get()1276 (uint8_t *)(rx_desc->w0 & GMAC_RXW0_ADDR); in frame_get()1279 frame_is_complete = (bool)(rx_desc->w1 & GMAC_RXW1_EOF); in frame_get()[all …]
557 static void get_and_refill_desc_buffs(struct xgmac_dma_rx_desc *rx_desc, uint16_t desc_id, in get_and_refill_desc_buffs() argument581 rx_desc->rdes0 = POINTER_TO_UINT(new_buff->data); in get_and_refill_desc_buffs()582 rx_desc->rdes1 = POINTER_TO_UINT(new_buff->data) >> XGMAC_REG_SIZE_BITS; in get_and_refill_desc_buffs()590 rx_desc->rdes0 = 0u; in get_and_refill_desc_buffs()591 rx_desc->rdes0 = 1u; in get_and_refill_desc_buffs()607 rx_desc->rdes2 = POINTER_TO_UINT(new_buff->data); in get_and_refill_desc_buffs()613 rx_desc->rdes3 = XGMAC_RDES3_OWN | XGMAC_RDES3_IOC | in get_and_refill_desc_buffs()628 struct xgmac_dma_rx_desc *rx_desc, rx_desc_data; in eth_dwc_xgmac_rx_irq_work() local636 rx_desc = (struct xgmac_dma_rx_desc *)(fisrt_rx_desc + rx_desc_meta->next_to_read); in eth_dwc_xgmac_rx_irq_work()637 arch_dcache_invd_range(rx_desc, sizeof(rx_desc)); in eth_dwc_xgmac_rx_irq_work()[all …]
674 data->adc_hal_dma_ctx.rx_desc = k_aligned_alloc(sizeof(uint32_t), in adc_esp32_init()676 if (!data->adc_hal_dma_ctx.rx_desc) { in adc_esp32_init()680 LOG_DBG("rx_desc = 0x%08X", (unsigned int)data->adc_hal_dma_ctx.rx_desc); in adc_esp32_init()685 k_free(data->adc_hal_dma_ctx.rx_desc); in adc_esp32_init()
