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Searched refs:reg_write (Results 1 – 7 of 7) sorted by relevance

/Zephyr-latest/include/zephyr/arch/riscv/
Dreg.h19 #define reg_write(reg, val) ({ __asm__("mv " STRINGIFY(reg) ", %0" : : "r"(val)); }) macro
/Zephyr-latest/drivers/sensor/ti/ina3221/
Dina3221.c36 static int reg_write(const struct device *dev, uint8_t addr, uint16_t reg_data) in reg_write() function
97 ret = reg_write(dev, INA3221_CONFIG, reg_data); in ina3221_init()
108 ret = reg_write(dev, INA3221_CONFIG, reg_data); in ina3221_init()
129 ret = reg_write(dev, INA3221_CONFIG, reg_data); in start_measurement()
/Zephyr-latest/tests/arch/riscv/userspace/riscv_gp/src/
Dmain.c36 reg_write(gp, 0xbad); in rogue_user_fn()
/Zephyr-latest/drivers/sensor/bosch/bmi160/
Demul_bmi160.c61 static void reg_write(const struct emul *target, int regn, int val) in reg_write() function
210 reg_write(target, regn, val); in bmi160_emul_io_spi()
261 reg_write(target, data->cur_reg, msgs->buf[0]); in bmi160_emul_transfer_i2c()
/Zephyr-latest/drivers/gpio/
Dgpio_renesas_ra.c118 static inline void reg_write(const struct device *dev, size_t offset, uint32_t value) in reg_write() function
135 reg_write(dev, PCNTR3_OFFSET, (clr << PCNTR3_PORR0_OFFSET) | set << PCNTR3_POSR0_OFFSET); in port_write()
/Zephyr-latest/drivers/spi/
Dspi_dw.h110 static void reg_write(uint8_t size, uint32_t data, mm_reg_t addr, uint32_t off) in reg_write() function
Dspi_dw.c658 .write_func = reg_write, \