Searched refs:reg_offset (Results 1 – 3 of 3) sorted by relevance
| /Zephyr-latest/drivers/reset/ |
| D | reset_npcx.c | 41 uint8_t reg_offset; in reset_npcx_line_toggle() local
49 reg_offset = NPCX_RESET_CTL_REG_OFFSET(id); in reset_npcx_line_toggle()
54 reg->SWRST_CTL[reg_offset] |= BIT(reg_bit); in reset_npcx_line_toggle()
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| /Zephyr-latest/drivers/pwm/ |
| D | pwm_intel_blinky.c | 27 uint32_t reg_offset; member
78 sys_write32(val, rt->reg_base + cfg->reg_offset); in bk_intel_set_cycles()
118 .reg_offset = DT_INST_PROP(n, reg_offset), \
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| /Zephyr-latest/drivers/usb_c/tcpc/ |
| D | ucpd_numaker.c | 119 #define NUMAKER_UTCPD_REG_WRITE_BY_OFFSET(dev, reg_offset, val) \ argument
123 LOG_ERR("UTCPD register (0x%04x) write timeout", reg_offset); \
125 sys_write32((val), ((uintptr_t)utcpd_base) + reg_offset); \
133 #define NUMAKER_UTCPD_REG_FORCE_WRITE_BY_OFFSET(dev, reg_offset, val) \ argument
137 LOG_ERR("UTCPD register (0x%04x) write timeout, force-write", reg_offset); \
139 sys_write32((val), ((uintptr_t)utcpd_base) + reg_offset); \
151 #define NUMAKER_UTCPD_REG_READ_BY_OFFSET(dev, reg_offset) \ argument
152 ({ sys_read32(((uintptr_t)utcpd_base) + reg_offset); })
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