Searched refs:qspi_clk (Results 1 – 3 of 3) sorted by relevance
7 output wire qspi_clk, port67 .ext_flash_qspi_pins_dclk (qspi_clk),
23 set_output_delay -clock {clk_50 } -rise -min 11 [get_ports {qspi_clk}]
123 set_location_assignment PIN_B2 -to qspi_clk224 set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to qspi_clk
