Home
last modified time | relevance | path

Searched refs:pwr (Results 1 – 25 of 59) sorted by relevance

123

/Zephyr-latest/boards/shields/nrf7002eb/
Dnrf7002eb.overlay33 wifi-max-tx-pwr-2g-dsss = <21>;
34 wifi-max-tx-pwr-2g-mcs0 = <16>;
35 wifi-max-tx-pwr-2g-mcs7 = <16>;
36 wifi-max-tx-pwr-5g-low-mcs0 = <13>;
37 wifi-max-tx-pwr-5g-low-mcs7 = <13>;
38 wifi-max-tx-pwr-5g-mid-mcs0 = <13>;
39 wifi-max-tx-pwr-5g-mid-mcs7 = <13>;
40 wifi-max-tx-pwr-5g-high-mcs0 = <12>;
41 wifi-max-tx-pwr-5g-high-mcs7 = <12>;
/Zephyr-latest/boards/shields/nrf7002ek/
Dnrf7002ek_common_5g.dtsi7 wifi-max-tx-pwr-5g-low-mcs0 = <13>;
8 wifi-max-tx-pwr-5g-low-mcs7 = <13>;
9 wifi-max-tx-pwr-5g-mid-mcs0 = <13>;
10 wifi-max-tx-pwr-5g-mid-mcs7 = <13>;
11 wifi-max-tx-pwr-5g-high-mcs0 = <12>;
12 wifi-max-tx-pwr-5g-high-mcs7 = <12>;
Dnrf7002ek_common.dtsi21 wifi-max-tx-pwr-2g-dsss = <21>;
22 wifi-max-tx-pwr-2g-mcs0 = <16>;
23 wifi-max-tx-pwr-2g-mcs7 = <16>;
/Zephyr-latest/boards/nordic/nrf7002dk/
Dnrf70_common_5g.dtsi7 wifi-max-tx-pwr-5g-low-mcs0 = <9>;
8 wifi-max-tx-pwr-5g-low-mcs7 = <9>;
9 wifi-max-tx-pwr-5g-mid-mcs0 = <11>;
10 wifi-max-tx-pwr-5g-mid-mcs7 = <11>;
11 wifi-max-tx-pwr-5g-high-mcs0 = <13>;
12 wifi-max-tx-pwr-5g-high-mcs7 = <13>;
Dnrf70_common.dtsi12 wifi-max-tx-pwr-2g-dsss = <21>;
13 wifi-max-tx-pwr-2g-mcs0 = <16>;
14 wifi-max-tx-pwr-2g-mcs7 = <16>;
/Zephyr-latest/include/zephyr/drivers/dma/
Ddma_mcux_lpc.h50 #define LPC_DMA_BURSTPOWER(pwr) (((pwr) & 0x7) << 5) argument
/Zephyr-latest/boards/nordic/thingy52/
Dthingy52_nrf52832.dts76 vdd_pwr: vdd-pwr-ctrl {
78 regulator-name = "vdd-pwr-ctrl";
84 spk_pwr: spk-pwr-ctrl {
86 regulator-name = "spk-pwr-ctrl";
90 mpu_pwr: mpu-pwr-ctrl {
92 regulator-name = "mpu-pwr-ctrl";
97 mic_pwr: mic-pwr-ctrl {
99 regulator-name = "mic-pwr-ctrl";
104 ccs_pwr: ccs-pwr-ctrl {
106 regulator-name = "ccs-pwr-ctrl";
/Zephyr-latest/samples/drivers/led/led_strip/boards/
Dblueclover_plt_demo_v2_nrf52832.overlay8 led_pwr: led-pwr-ctrl {
10 regulator-name = "led-pwr-ctrl";
/Zephyr-latest/boards/seco/stm32f3_seco_d23/
Dstm32f3_seco_d23.dts36 out_3p3v_pwr: 3p3v-out-pwr-ctrl {
38 regulator-name = "3p3v-out-pwr-ctrl";
45 out_gpio_bufa_pwr: out-gpio-bufa-pwr-ctrl {
47 regulator-name = "out-gpio-bufa-pwr-ctrl";
53 out_gpio_bufb_pwr: out-gpio-bufb-pwr-ctrl {
55 regulator-name = "out-gpio-bufb-pwr-ctrl";
61 in_gpio_buf_pwr: in-gpio-buf-pwr-ctrl {
63 regulator-name = "in-gpio-buf-pwr-ctrl";
/Zephyr-latest/samples/boards/st/power_mgmt/wkup_pins/boards/
Dnucleo_l4r5zi.overlay13 &pwr {
Dnucleo_u575zi_q.overlay13 &pwr {
Dnucleo_u5a5zj_q.overlay13 &pwr {
Dnucleo_wl55jc.overlay13 &pwr {
/Zephyr-latest/doc/hardware/peripherals/sensor/
Ddevice_tree.rst22 accel-pwr-mode = <ICM42688_ACCEL_LN>; /* Low noise mode */
25 gyro-pwr-mode = <ICM42688_GYRO_LN>; /* Low noise mode */
/Zephyr-latest/dts/riscv/wch/
Dch32v00x.dtsi98 pwr: pwr@40007000 { label
99 compatible = "wch,pwr";
/Zephyr-latest/boards/seeed/lora_e5_dev_board/
Dlora_e5_dev_board.dts56 pwr_3v3: pwr-3v3-ctrl {
63 regulator-name = "pwr-3v3-ctrl";
69 pwr_5v: pwr-5v-ctrl {
75 regulator-name = "pwr-5v-ctrl";
/Zephyr-latest/dts/arm/st/l4/
Dstm32l4r5Xi.dtsi21 &pwr {
/Zephyr-latest/dts/arm/st/wb/
Dstm32wb55Xg.dtsi24 &pwr {
/Zephyr-latest/boards/shields/waveshare_epaper/
Dwaveshare_epaper_gdew042t2.overlay33 pwr = [03 00 26 26 09];
Dwaveshare_epaper_gdew075t7.overlay34 pwr = [07 07 3f 3f];
Dwaveshare_epaper_gdew042t2-p.overlay42 pwr = [ 03 02 2b 2b ];
/Zephyr-latest/drivers/ieee802154/
Dieee802154_cc2520.c733 uint8_t pwr; in cc2520_set_txpower() local
740 pwr = 0xF7; in cc2520_set_txpower()
743 pwr = 0xF2; in cc2520_set_txpower()
746 pwr = 0xAB; in cc2520_set_txpower()
749 pwr = 0x13; in cc2520_set_txpower()
752 pwr = 0x32; in cc2520_set_txpower()
755 pwr = 0x81; in cc2520_set_txpower()
758 pwr = 0x88; in cc2520_set_txpower()
761 pwr = 0x2C; in cc2520_set_txpower()
764 pwr = 0x03; in cc2520_set_txpower()
[all …]
/Zephyr-latest/drivers/display/
Duc81xx.c44 struct uc81xx_dt_array pwr; member
220 LOG_HEXDUMP_DBG(p->pwr.data, p->pwr.len, "PWR"); in uc81xx_set_profile()
221 if (uc81xx_write_array_opt(dev, UC81XX_CMD_PWR, &p->pwr)) { in uc81xx_set_profile()
734 UC81XX_MAKE_ARRAY_OPT(n, pwr); \
743 .pwr = UC81XX_ASSIGN_ARRAY(n, pwr), \
/Zephyr-latest/boards/atmel/sam0/samr21_xpro/
Dsamr21_xpro.dts173 tx-pwr-min = [01 11]; /* -17.0 dBm */
174 tx-pwr-max = [00 04]; /* 4.0 dBm */
175 tx-pwr-table = [00 01 03 04 05 05 06 06
/Zephyr-latest/boards/nxp/vmu_rt1170/
Dvmu_rt1170_mimxrt1176_cm7.dts257 accel-pwr-mode = <ICM42688_DT_ACCEL_LN>;
260 gyro-pwr-mode = <ICM42688_DT_GYRO_LN>;
275 accel-pwr-mode = <ICM42688_DT_ACCEL_LN>;
278 gyro-pwr-mode = <ICM42688_DT_GYRO_LN>;
458 pwr-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;

123