Searched refs:pow_reg (Results 1 – 2 of 2) sorted by relevance
25 uint8_t pow_reg = data->pwr_reg; in adxl372_fifo_flush_rtio() local29 pow_reg &= ~ADXL372_POWER_CTL_MODE_MSK; in adxl372_fifo_flush_rtio()30 pow_reg |= ADXL372_POWER_CTL_MODE(ADXL372_STANDBY); in adxl372_fifo_flush_rtio()33 const uint8_t reg_addr_w[2] = {ADXL372_REG_WRITE(ADXL372_POWER_CTL), pow_reg}; in adxl372_fifo_flush_rtio()55 pow_reg = data->pwr_reg; in adxl372_fifo_flush_rtio()57 pow_reg &= ~ADXL372_POWER_CTL_MODE_MSK; in adxl372_fifo_flush_rtio()58 pow_reg |= ADXL372_POWER_CTL_MODE(cfg->op_mode); in adxl372_fifo_flush_rtio()62 const uint8_t reg_addr_w4[2] = {ADXL372_REG_WRITE(ADXL372_POWER_CTL), pow_reg}; in adxl372_fifo_flush_rtio()
37 uint8_t pow_reg = data->pwr_reg; in adxl367_fifo_flush_rtio() local39 pow_reg &= ~ADXL367_POWER_CTL_MEASURE_MSK; in adxl367_fifo_flush_rtio()40 pow_reg |= FIELD_PREP(ADXL367_POWER_CTL_MEASURE_MSK, ADXL367_STANDBY); in adxl367_fifo_flush_rtio()43 const uint8_t reg_addr_w[3] = {ADXL367_SPI_WRITE_REG, ADXL367_POWER_CTL, pow_reg}; in adxl367_fifo_flush_rtio()59 pow_reg = data->pwr_reg; in adxl367_fifo_flush_rtio()61 pow_reg &= ~ADXL367_POWER_CTL_MEASURE_MSK; in adxl367_fifo_flush_rtio()62 pow_reg |= FIELD_PREP(ADXL367_POWER_CTL_MEASURE_MSK, ADXL367_MEASURE); in adxl367_fifo_flush_rtio()66 const uint8_t reg_addr_w4[3] = {ADXL367_SPI_WRITE_REG, ADXL367_POWER_CTL, pow_reg}; in adxl367_fifo_flush_rtio()
