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/Zephyr-latest/soc/silabs/silabs_sim3/sim3u/
Dgen_crossbar_config.py140 def __init__(self, number, bits, portbanks): argument
145 self.portbanks = portbanks
159 self.portbanks[pin[0]].unskip(pin[1])
200 self.portbanks[mux.pin[0]].apply_mux(mux.pin[1], mux)
297 portbanks = [Portbank(), Portbank(), Portbank(), Portbank()]
299 Crossbar(0, crossbar0_bits, portbanks),
300 Crossbar(1, crossbar1_bits, portbanks),
310 for index, portbank in enumerate(portbanks):