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/Zephyr-latest/soc/silabs/silabs_sim3/sim3u/
Dgen_crossbar_config.py127 def __init__(self, bit, signals, pin_first, pin_last): argument
128 assert pin_first <= pin_last
132 self.pin_first = pin_first
179 if mux.pin < bit.pin_first or mux.pin > bit.pin_last: