1 /* 2 * Copyright (c) 2020 - 2021 Nordic Semiconductor ASA 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #include <platform/nrf_802154_irq.h> 8 9 #include <zephyr/irq.h> 10 #include <nrfx.h> 11 nrf_802154_irq_init(uint32_t irqn,int32_t prio,nrf_802154_isr_t isr)12void nrf_802154_irq_init(uint32_t irqn, int32_t prio, nrf_802154_isr_t isr) 13 { 14 uint32_t flags = 0U; 15 16 if (prio < 0) { 17 prio = 0; 18 flags |= IRQ_ZERO_LATENCY; 19 } 20 21 irq_connect_dynamic(irqn, prio, isr, NULL, flags); 22 } 23 nrf_802154_irq_enable(uint32_t irqn)24void nrf_802154_irq_enable(uint32_t irqn) 25 { 26 irq_enable(irqn); 27 } 28 nrf_802154_irq_disable(uint32_t irqn)29void nrf_802154_irq_disable(uint32_t irqn) 30 { 31 irq_disable(irqn); 32 } 33 nrf_802154_irq_set_pending(uint32_t irqn)34void nrf_802154_irq_set_pending(uint32_t irqn) 35 { 36 /* Zephyr does not provide abstraction layer for setting pending IRQ */ 37 NVIC_SetPendingIRQ(irqn); 38 } 39 nrf_802154_irq_clear_pending(uint32_t irqn)40void nrf_802154_irq_clear_pending(uint32_t irqn) 41 { 42 /* Zephyr does not provide abstraction layer for clearing pending IRQ */ 43 NVIC_ClearPendingIRQ(irqn); 44 } 45 nrf_802154_irq_is_enabled(uint32_t irqn)46bool nrf_802154_irq_is_enabled(uint32_t irqn) 47 { 48 return irq_is_enabled(irqn); 49 } 50 nrf_802154_irq_priority_get(uint32_t irqn)51uint32_t nrf_802154_irq_priority_get(uint32_t irqn) 52 { 53 return NVIC_GetPriority(irqn); 54 } 55