Home
last modified time | relevance | path

Searched refs:mdio_write (Results 1 – 15 of 15) sorted by relevance

/Zephyr-latest/drivers/ethernet/phy/
Dphy_dm8806.c93 res = mdio_write(cfg->mdio, DM8806_SMI_BUS_CTRL_PHY_ADDRESS, in phy_dm8806_write_reg()
102 res = mdio_write(cfg->mdio, phyad, regad, data); in phy_dm8806_write_reg()
114 res = mdio_write(cfg->mdio, DM8806_SMI_BUS_ERR_CHK_PHY_ADDRESS, in phy_dm8806_write_reg()
189 res = mdio_write(cfg->mdio, DM8806_SMI_BUS_CTRL_PHY_ADDRESS, in phy_dm8806_read_reg()
269 mdio_write(cfg->mdio, DM8806_INT_STAT_PHY_ADDR, DM8806_INT_STAT_REG_ADDR, data); in phy_dm8806_thread_cb()
333 res = mdio_write(cfg->mdio, DM8806_INT_MASK_CTRL_PHY_ADDR, DM8806_INT_MASK_CTRL_REG_ADDR, in phy_dm8806_init_interrupt()
350 res = mdio_write(cfg->mdio, DM8806_WOLL_CTRL_REG_PHY_ADDR, DM8806_WOLL_CTRL_REG_REG_ADDR, in phy_dm8806_init_interrupt()
422 ret = mdio_write(cfg->mdio, DM8806_PHY_ADDRESS_18H, DM8806_PORT5_MAC_CONTROL, val); in phy_dm8806_init()
436 ret = mdio_write(cfg->mdio, DM8806_PHY_ADDRESS_18H, DM8806_IRQ_LED_CONTROL, val); in phy_dm8806_init()
455 ret = mdio_write(cfg->mdio, port_address, in phy_dm8806_init()
[all …]
Dphy_microchip_t1s.c120 return mdio_write(cfg->mdio, cfg->phy_addr, reg, (uint16_t)data); in phy_mc_t1s_write()
128 ret = mdio_write(cfg->mdio, cfg->phy_addr, MII_MMD_ACR, devad); in mdio_setup_c45_indirect_access()
133 ret = mdio_write(cfg->mdio, cfg->phy_addr, MII_MMD_AADR, reg); in mdio_setup_c45_indirect_access()
138 return mdio_write(cfg->mdio, cfg->phy_addr, MII_MMD_ACR, devad | BIT(14)); in mdio_setup_c45_indirect_access()
175 return mdio_write(cfg->mdio, cfg->phy_addr, MII_MMD_AADR, val); in phy_mc_t1s_c45_write()
Dphy_adin2111.c122 return mdio_write(cfg->mdio, cfg->phy_addr, reg, val); in phy_adin2111_c22_write()
131 rval = mdio_write(cfg->mdio, cfg->phy_addr, ADIN1100_MMD_ACCESS_CNTRL, devad); in phy_adin2111_c45_setup_dev_reg()
135 rval = mdio_write(cfg->mdio, cfg->phy_addr, ADIN1100_MMD_ACCESS, reg); in phy_adin2111_c45_setup_dev_reg()
140 return mdio_write(cfg->mdio, cfg->phy_addr, ADIN1100_MMD_ACCESS_CNTRL, devad | BIT(14)); in phy_adin2111_c45_setup_dev_reg()
175 return mdio_write(cfg->mdio, cfg->phy_addr, ADIN1100_MMD_ACCESS, val); in phy_adin2111_c45_write()
Dphy_microchip_vsc8541.c489 ret = mdio_write(cfg->mdio_dev, cfg->addr, PHY_REG_PAGE_SELECTOR, (uint16_t)page); in phy_mc_vsc8541_read()
527 ret = mdio_write(cfg->mdio_dev, cfg->addr, PHY_REG_PAGE_SELECTOR, (uint16_t)page); in phy_mc_vsc8541_write()
535 ret = mdio_write(cfg->mdio_dev, cfg->addr, reg_addr, (uint16_t)data); in phy_mc_vsc8541_write()
Dphy_mii.c68 return mdio_write(cfg->mdio, cfg->phy_addr, reg_addr, value); in phy_mii_reg_write()
Dphy_qualcomm_ar8031.c97 ret = mdio_write(config->mdio_dev, config->addr, reg_addr, (uint16_t)data); in qc_ar8031_write()
Dphy_tja1103.c90 return mdio_write(cfg->mdio, cfg->phy_addr, reg, val); in phy_tja1103_c22_write()
Dphy_microchip_ksz8081.c85 ret = mdio_write(config->mdio_dev, config->addr, reg_addr, (uint16_t)data); in phy_mc_ksz8081_write()
Dphy_ti_dp83825.c87 ret = mdio_write(config->mdio_dev, config->addr, reg_addr, (uint16_t)data); in phy_ti_dp83825_write()
Dphy_ti_dp83867.c86 ret = mdio_write(config->mdio_dev, config->addr, reg_addr, (uint16_t)data); in phy_ti_dp83867_write()
Dphy_realtek_rtl8211f.c106 ret = mdio_write(config->mdio_dev, config->addr, reg_addr, (uint16_t)data); in phy_rt_rtl8211f_write()
/Zephyr-latest/drivers/mdio/
Dmdio_nxp_enet_qos.c135 struct mdio_transaction mdio_write = { in nxp_enet_qos_mdio_write() local
144 return do_transaction(&mdio_write); in nxp_enet_qos_mdio_write()
Dmdio_shell.c123 if (mdio_write(dev, port_addr, reg_addr, data) < 0) { in cmd_mdio_write()
/Zephyr-latest/drivers/ethernet/
Deth_numaker.c72 static void mdio_write(synopGMACdevice *gmacdev, uint32_t addr, uint32_t reg, int data) in mdio_write() function
101 mdio_write(gmacdev, eth_phy_addr, MII_BMCR, BMCR_RESET); in reset_phy()
124 mdio_write(gmacdev, eth_phy_addr, MII_ADVERTISE, NUMAKER_MII_CONFIG); in reset_phy()
126 mdio_write(gmacdev, eth_phy_addr, MII_BMCR, reg | BMCR_ANRESTART); in reset_phy()
/Zephyr-latest/include/zephyr/drivers/
Dmdio.h148 __syscall int mdio_write(const struct device *dev, uint8_t prtad, uint8_t regad,