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Searched refs:mclk_rate (Results 1 – 8 of 8) sorted by relevance

/Zephyr-latest/drivers/dai/nxp/sai/
Dsai.c50 uint32_t msel, mclk_rate; in sai_mclk_config() local
65 ret = get_mclk_rate(&cfg->clk_data, bclk_source, &mclk_rate); in sai_mclk_config()
71 LOG_DBG("source MCLK is %u", mclk_rate); in sai_mclk_config()
73 LOG_DBG("target MCLK is %u", bespoke->mclk_rate); in sai_mclk_config()
76 mclk_config.mclkSourceClkHz = mclk_rate; in sai_mclk_config()
79 mclk_config.mclkHz = bespoke->mclk_rate; in sai_mclk_config()
196 bespoke->mclk_rate == bespoke->bclk_rate) { in sai_config_set_err_051421()
396 SAI_TxSetBitClockRate(UINT_TO_I2S(data->regmap), bespoke->mclk_rate, in sai_config_set()
400 SAI_RxSetBitClockRate(UINT_TO_I2S(data->regmap), bespoke->mclk_rate, in sai_config_set()
Dsai.h293 uint32_t mclk_rate; member
/Zephyr-latest/drivers/dai/intel/ssp/
Dssp.c214 uint32_t mclk_rate) in dai_ssp_setup_initial_mclk_source() argument
233 if (ft[i].freq % mclk_rate == 0) { in dai_ssp_setup_initial_mclk_source()
240 LOG_ERR("MCLK %d, no valid source", mclk_rate); in dai_ssp_setup_initial_mclk_source()
272 uint32_t mclk_rate) in dai_ssp_check_current_mclk_source() argument
279 LOG_INF("MCLK %d, source = %d", mclk_rate, mp->mclk_source_clock); in dai_ssp_check_current_mclk_source()
281 if (ft[mp->mclk_source_clock].freq % mclk_rate != 0) { in dai_ssp_check_current_mclk_source()
283 mclk_rate, mp->mclk_source_clock); in dai_ssp_check_current_mclk_source()
289 if (mp->mclk_rate[mclk_id] != mclk_rate) { in dai_ssp_check_current_mclk_source()
291 mclk_id, mclk_rate, mp->mclk_rate[mclk_id]); in dai_ssp_check_current_mclk_source()
337 static int dai_ssp_mn_set_mclk(struct dai_intel_ssp *dp, uint16_t mclk_id, uint32_t mclk_rate) in dai_ssp_mn_set_mclk() argument
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Ddai-params-intel-ipc3.h106 uint32_t mclk_rate; /* mclk frequency in Hz */ member
Dssp.h104 int mclk_rate[DAI_INTEL_SSP_NUM_MCLK]; member
/Zephyr-latest/drivers/dai/nxp/esai/
Desai.c470 ret = esai_get_clock_rate_config(bespoke->mclk_rate, bespoke->mclk_rate, in esai_config_set()
480 ret = esai_get_clock_rate_config(bespoke->mclk_rate, bespoke->mclk_rate, in esai_config_set()
Desai.h196 uint32_t mclk_rate; member
/Zephyr-latest/tests/boards/intel_adsp/ssp/src/
Dmain.c25 uint32_t mclk_rate; member
369 ssp_config.mclk_rate = 24576000; in ZTEST()