Searched refs:intenable (Results 1 – 7 of 7) sorted by relevance
28 unsigned int intenable, key = arch_irq_lock(); in arch_irq_offload() local34 __asm__ volatile("rsr %0, INTENABLE" : "=r"(intenable)); in arch_irq_offload()35 intenable |= BIT(ZSR_IRQ_OFFLOAD_INT); in arch_irq_offload()37 :: "r"(intenable), "r"(BIT(ZSR_IRQ_OFFLOAD_INT))); in arch_irq_offload()
292 uint32_t irqs, intenable, m; \295 __asm__ volatile("rsr.intenable %0" : "=r"(intenable)); \296 irqs &= intenable; \
16 static uint32_t intenable; variable25 intenable = XTENSA_RSR("INTENABLE"); in pm_state_set()41 z_xt_ints_on(intenable); in pm_state_exit_post_ops()
14 static uint32_t intenable; variable23 intenable = XTENSA_RSR("INTENABLE"); in pm_state_set()39 z_xt_ints_on(intenable); in pm_state_exit_post_ops()
60 uint32_t intenable; member141 core_desc[cpu].intenable = XTENSA_RSR("INTENABLE"); in pm_state_set()185 z_xt_ints_on(core_desc[cpu].intenable); in pm_state_exit_post_ops()
120 uint32_t intenable; member286 core_desc[cpu].intenable = XTENSA_RSR("INTENABLE"); in pm_state_set()424 z_xt_ints_on(core_desc[cpu].intenable); in pm_state_exit_post_ops()
