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Searched refs:gpio_reg (Results 1 – 4 of 4) sorted by relevance

/Zephyr-latest/drivers/gpio/
Dgpio_npcx.c50 ((struct gpio_reg *)((const struct gpio_npcx_config *)(dev)->config)->base)
106 struct gpio_reg *const inst = HAL_INSTANCE(dev); in gpio_npcx_config()
185 struct gpio_reg *const inst = HAL_INSTANCE(port); in gpio_npcx_pin_get_config()
233 struct gpio_reg *const inst = HAL_INSTANCE(dev); in gpio_npcx_port_get_raw()
245 struct gpio_reg *const inst = HAL_INSTANCE(dev); in gpio_npcx_port_set_masked_raw()
256 struct gpio_reg *const inst = HAL_INSTANCE(dev); in gpio_npcx_port_set_bits_raw()
267 struct gpio_reg *const inst = HAL_INSTANCE(dev); in gpio_npcx_port_clear_bits_raw()
278 struct gpio_reg *const inst = HAL_INSTANCE(dev); in gpio_npcx_port_toggle_bits()
/Zephyr-latest/drivers/adc/
Dadc_max1125x.c504 uint8_t gpio_reg = 0; in max1125x_channel_setup() local
573 gpio_reg |= max_config->gpio.gpio0_enable << MAX1125X_GPIO_CTRL_GPIO0_EN; in max1125x_channel_setup()
574 gpio_reg |= max_config->gpio.gpio1_enable << MAX1125X_GPIO_CTRL_GPIO1_EN; in max1125x_channel_setup()
575 gpio_reg |= max_config->gpio.gpio0_direction << MAX1125X_GPIO_CTRL_DIRO; in max1125x_channel_setup()
576 gpio_reg |= max_config->gpio.gpio1_direction << MAX1125X_GPIO_CTRL_DIR1; in max1125x_channel_setup()
577 max1125x_write_reg(dev, MAX1125X_REG_GPIO_CTRL, &gpio_reg, MAX1125X_REG_GPIO_CTRL_LEN); in max1125x_channel_setup()
/Zephyr-latest/soc/nuvoton/npcx/common/
Dregisters.c43 NPCX_REG_SIZE_CHECK(gpio_reg, 0x008);
44 NPCX_REG_OFFSET_CHECK(gpio_reg, PLOCK_CTL, 0x007);
/Zephyr-latest/soc/nuvoton/npcx/common/reg/
Dreg_def.h441 struct gpio_reg { struct