Searched refs:gpio_irq_base (Results 1 – 2 of 2) sorted by relevance
52 uint32_t gpio_irq_base; member109 (uint8_t)(cfg->gpio_irq_base >> CONFIG_1ST_LEVEL_INTERRUPT_BITS)); in gpio_sifive_irq_handler()244 irq_disable(gpio_sifive_pin_irq(cfg->gpio_irq_base, pin)); in gpio_sifive_pin_interrupt_configure()256 irq_enable(gpio_sifive_pin_irq(cfg->gpio_irq_base, pin)); in gpio_sifive_pin_interrupt_configure()270 irq_enable(gpio_sifive_pin_irq(cfg->gpio_irq_base, pin)); in gpio_sifive_pin_interrupt_configure()362 .gpio_irq_base = DT_INST_IRQN(0),
49 uint32_t gpio_irq_base; member241 .gpio_irq_base = DT_INST_IRQN(n), \
