| /Zephyr-latest/drivers/dac/ |
| D | dac_sam0.c | 36 uint16_t gclk_id; member
88 GCLK->PCHCTRL[cfg->gclk_id].reg = GCLK_PCHCTRL_CHEN in dac_sam0_init()
93 | GCLK_CLKCTRL_ID(cfg->gclk_id); in dac_sam0_init()
135 .gclk_id = DT_INST_CLOCKS_CELL_BY_NAME(n, gclk, id), \
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| /Zephyr-latest/drivers/pwm/ |
| D | pwm_sam0_tcc.c | 34 uint16_t gclk_id; member
110 GCLK->PCHCTRL[cfg->gclk_id].reg = GCLK_PCHCTRL_CHEN in pwm_sam0_init()
115 | GCLK_CLKCTRL_ID(cfg->gclk_id); in pwm_sam0_init()
156 .gclk_id = DT_INST_CLOCKS_CELL_BY_NAME(inst, gclk, id), \
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| D | pwm_sam0_tc.c | 44 uint16_t gclk_id; member
140 GCLK->PCHCTRL[cfg->gclk_id].reg = GCLK_PCHCTRL_CHEN in pwm_sam0_init()
145 | GCLK_CLKCTRL_ID(cfg->gclk_id); in pwm_sam0_init()
201 .gclk_id = DT_INST_CLOCKS_CELL_BY_NAME(inst, gclk, id), \
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| /Zephyr-latest/drivers/can/ |
| D | can_sam0.c | 33 uint16_t gclk_id; member
118 GCLK->PCHCTRL[cfg->gclk_id].reg = GCLK_PCHCTRL_CHEN in can_sam0_clock_enable()
220 .gclk_id = DT_INST_CLOCKS_CELL_BY_NAME(inst, gclk, id), \
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| /Zephyr-latest/drivers/counter/ |
| D | counter_sam0_tc32.c | 40 uint16_t gclk_id; member
340 GCLK->PCHCTRL[cfg->gclk_id].reg = GCLK_PCHCTRL_CHEN in counter_sam0_tc32_initialize()
345 | GCLK_CLKCTRL_ID(cfg->gclk_id); in counter_sam0_tc32_initialize()
421 .gclk_id = DT_INST_CLOCKS_CELL_BY_NAME(n, gclk, id), \
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| /Zephyr-latest/drivers/rtc/ |
| D | rtc_sam0.c | 50 uint16_t gclk_id; member
508 cfg->gclk_id, cfg->gclk_gen, cfg->prescaler, cfg->osc32_src); in rtc_sam0_init()
514 GCLK->PCHCTRL[cfg->gclk_id].reg = GCLK_PCHCTRL_CHEN in rtc_sam0_init()
520 | GCLK_CLKCTRL_ID(cfg->gclk_id); in rtc_sam0_init()
579 .gclk_id = DT_INST_CLOCKS_CELL_BY_NAME(n, gclk, id) \
584 .gclk_id = 0 \
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| /Zephyr-latest/drivers/adc/ |
| D | adc_sam0.c | 55 uint16_t gclk_id; member
456 GCLK->PCHCTRL[cfg->gclk_id].reg = GCLK_PCHCTRL_CHEN in adc_sam0_init()
461 | GCLK_CLKCTRL_ID(cfg->gclk_id); in adc_sam0_init()
569 .gclk_id = DT_INST_CLOCKS_CELL_BY_NAME(n, gclk, id), \
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| /Zephyr-latest/drivers/spi/ |
| D | spi_sam0.c | 37 uint16_t gclk_id; member
652 GCLK->PCHCTRL[cfg->gclk_id].reg = GCLK_PCHCTRL_CHEN in spi_sam0_init()
657 | GCLK_CLKCTRL_ID(cfg->gclk_id); in spi_sam0_init()
724 .gclk_id = DT_INST_CLOCKS_CELL_BY_NAME(n, gclk, id), \
736 .gclk_id = DT_INST_CLOCKS_CELL_BY_NAME(n, gclk, id), \
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| /Zephyr-latest/drivers/i2c/ |
| D | i2c_sam0.c | 43 uint16_t gclk_id; member
716 GCLK->PCHCTRL[cfg->gclk_id].reg = GCLK_PCHCTRL_CHEN in i2c_sam0_initialize()
721 | GCLK_CLKCTRL_ID(cfg->gclk_id); in i2c_sam0_initialize()
825 .gclk_id = DT_INST_CLOCKS_CELL_BY_NAME(n, gclk, id), \
838 .gclk_id = DT_INST_CLOCKS_CELL_BY_NAME(n, gclk, id), \
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| /Zephyr-latest/drivers/serial/ |
| D | uart_sam0.c | 44 uint16_t gclk_id; member
516 GCLK->PCHCTRL[cfg->gclk_id].reg = GCLK_PCHCTRL_CHEN in uart_sam0_init()
521 | GCLK_CLKCTRL_ID(cfg->gclk_id); in uart_sam0_init()
1278 .gclk_id = DT_INST_CLOCKS_CELL_BY_NAME(n, gclk, id), \
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