| /Zephyr-latest/drivers/dac/ |
| D | dac_sam0.c | 35 uint32_t gclk_gen; member
89 | GCLK_PCHCTRL_GEN(cfg->gclk_gen); in dac_sam0_init()
92 | GCLK_CLKCTRL_GEN(cfg->gclk_gen) in dac_sam0_init()
134 .gclk_gen = ASSIGNED_CLOCKS_CELL_BY_NAME(n, gclk, gen), \
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| /Zephyr-latest/drivers/pwm/ |
| D | pwm_sam0_tcc.c | 33 uint32_t gclk_gen; member
111 | GCLK_PCHCTRL_GEN(cfg->gclk_gen); in pwm_sam0_init()
114 | GCLK_CLKCTRL_GEN(cfg->gclk_gen) in pwm_sam0_init()
155 .gclk_gen = ASSIGNED_CLOCKS_CELL_BY_NAME(inst, gclk, gen), \
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| D | pwm_sam0_tc.c | 43 uint32_t gclk_gen; member
141 | GCLK_PCHCTRL_GEN(cfg->gclk_gen); in pwm_sam0_init()
144 | GCLK_CLKCTRL_GEN(cfg->gclk_gen) in pwm_sam0_init()
200 .gclk_gen = ASSIGNED_CLOCKS_CELL_BY_NAME(inst, gclk, gen), \
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| /Zephyr-latest/drivers/can/ |
| D | can_sam0.c | 32 uint32_t gclk_gen; member
119 | GCLK_PCHCTRL_GEN(cfg->gclk_gen); in can_sam0_clock_enable()
219 .gclk_gen = ASSIGNED_CLOCKS_CELL_BY_NAME(inst, gclk, gen), \
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| /Zephyr-latest/drivers/counter/ |
| D | counter_sam0_tc32.c | 39 uint32_t gclk_gen; member
341 | GCLK_PCHCTRL_GEN(cfg->gclk_gen); in counter_sam0_tc32_initialize()
344 | GCLK_CLKCTRL_GEN(cfg->gclk_gen) in counter_sam0_tc32_initialize()
420 .gclk_gen = ASSIGNED_CLOCKS_CELL_BY_NAME(n, gclk, gen), \
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| /Zephyr-latest/drivers/rtc/ |
| D | rtc_sam0.c | 49 uint32_t gclk_gen; member
508 cfg->gclk_id, cfg->gclk_gen, cfg->prescaler, cfg->osc32_src); in rtc_sam0_init()
515 | GCLK_PCHCTRL_GEN(cfg->gclk_gen); in rtc_sam0_init()
519 | GCLK_CLKCTRL_GEN(cfg->gclk_gen) in rtc_sam0_init()
578 .gclk_gen = ASSIGNED_CLOCKS_CELL_BY_NAME(n, gclk, gen), \
583 .gclk_gen = 0, \
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| /Zephyr-latest/drivers/adc/ |
| D | adc_sam0.c | 54 uint32_t gclk_gen; member
457 | GCLK_PCHCTRL_GEN(cfg->gclk_gen); in adc_sam0_init()
460 | GCLK_CLKCTRL_GEN(cfg->gclk_gen) in adc_sam0_init()
568 .gclk_gen = ASSIGNED_CLOCKS_CELL_BY_NAME(n, gclk, gen), \
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| /Zephyr-latest/drivers/spi/ |
| D | spi_sam0.c | 36 uint32_t gclk_gen; member
653 | GCLK_PCHCTRL_GEN(cfg->gclk_gen); in spi_sam0_init()
656 | GCLK_CLKCTRL_GEN(cfg->gclk_gen) in spi_sam0_init()
723 .gclk_gen = ASSIGNED_CLOCKS_CELL_BY_NAME(n, gclk, gen), \
735 .gclk_gen = ASSIGNED_CLOCKS_CELL_BY_NAME(n, gclk, gen), \
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| /Zephyr-latest/drivers/i2c/ |
| D | i2c_sam0.c | 42 uint32_t gclk_gen; member
717 | GCLK_PCHCTRL_GEN(cfg->gclk_gen); in i2c_sam0_initialize()
720 | GCLK_CLKCTRL_GEN(cfg->gclk_gen) in i2c_sam0_initialize()
824 .gclk_gen = ASSIGNED_CLOCKS_CELL_BY_NAME(n, gclk, gen), \
837 .gclk_gen = ASSIGNED_CLOCKS_CELL_BY_NAME(n, gclk, gen), \
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| /Zephyr-latest/drivers/serial/ |
| D | uart_sam0.c | 43 uint32_t gclk_gen; member
517 | GCLK_PCHCTRL_GEN(cfg->gclk_gen); in uart_sam0_init()
520 | GCLK_CLKCTRL_GEN(cfg->gclk_gen) in uart_sam0_init()
1277 .gclk_gen = ASSIGNED_CLOCKS_CELL_BY_NAME(n, gclk, gen), \
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