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Searched refs:fsr (Results 1 – 7 of 7) sorted by relevance

/Zephyr-latest/drivers/sensor/nxp/fxls8974/
Dfxls8974.c284 uint8_t fsr) in fxls8974_accel_convert() argument
289 micro_ms2 = (raw * SENSOR_G) >> fsr; in fxls8974_accel_convert()
305 uint8_t fsr; in fxls8974_get_accel_data() local
309 if (cfg->ops->byte_read(dev, FXLS8974_REG_CTRLREG1, &fsr)) { in fxls8974_get_accel_data()
314 fsr = (fsr & FXLS8974_CTRLREG1_FSR_MASK) >> 1; in fxls8974_get_accel_data()
315 switch (fsr) { in fxls8974_get_accel_data()
317 fsr = 10U; in fxls8974_get_accel_data()
320 fsr = 9U; in fxls8974_get_accel_data()
323 fsr = 8U; in fxls8974_get_accel_data()
326 fsr = 7U; in fxls8974_get_accel_data()
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/Zephyr-latest/arch/riscv/core/
Dasm_macros.inc39 .macro fsr, rs, mem
49 .macro fsr, rs, mem
/Zephyr-latest/arch/sparc/core/
Dinterrupt_trap.S139 st %fsr, [%sp]
228 st %fsr, [%sp + 64 + 0x80]
246 ld [%sp + 64 + 0x80], %fsr
/Zephyr-latest/drivers/serial/
Duart_renesas_rz_scif.c59 const uint32_t fsr = reg->FSR; in uart_rz_scif_err_check() local
66 if ((fsr & R_SCIFA0_FSR_PER_Msk) != 0) { in uart_rz_scif_err_check()
69 if ((fsr & R_SCIFA0_FSR_FER_Pos) != 0) { in uart_rz_scif_err_check()
/Zephyr-latest/arch/xtensa/core/offsets/
Doffsets.c45 GEN_OFFSET_SYM(_xtensa_irq_bsa_t, fsr);
/Zephyr-latest/arch/xtensa/include/
Dxtensa_asm2_context.h95 uintptr_t fsr; member
Dxtensa_asm2_s.h111 rur.fsr a0
135 wur.fsr a0