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Searched refs:fpga_reset_n (Results 1 – 3 of 3) sorted by relevance

/Zephyr-latest/soc/altr/zephyr_nios2f/cpu/
Dghrd_10m50da_top.v5 input wire fpga_reset_n, port
64 .reset_reset_n (fpga_reset_n),
110 always @(posedge clk_50 or negedge fpga_reset_n)
111 if (!fpga_reset_n)
Dghrd_timing.sdc16 set_false_path -to [get_ports {fpga_reset_n}]
17 set_false_path -from [get_ports {fpga_reset_n}]
Dghrd_10m50da.qsf393 set_location_assignment PIN_D9 -to fpga_reset_n
409 set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to fpga_reset_n