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Searched refs:fiu_reg (Results 1 – 4 of 4) sorted by relevance

/Zephyr-latest/soc/nuvoton/npcx/npcx4/
Dsoc.c29 struct fiu_reg *const inst = (struct fiu_reg *)(fiu_insts[i]); in soc_early_init_hook()
/Zephyr-latest/drivers/flash/
Dflash_npcx_fiu_qspi.c23 ((struct fiu_reg *)((const struct npcx_qspi_fiu_config *)(dev)->config)->base)
50 struct fiu_reg *const inst = HAL_INSTANCE(dev); in qspi_npcx_uma_cs_level()
62 struct fiu_reg *const inst = HAL_INSTANCE(dev); in qspi_npcx_uma_write_byte()
75 struct fiu_reg *const inst = HAL_INSTANCE(dev); in qspi_npcx_uma_read_byte()
90 struct fiu_reg *const inst = HAL_INSTANCE(dev); in qspi_npcx_config_uma_mode()
103 struct fiu_reg *const inst = HAL_INSTANCE(dev); in qspi_npcx_config_dra_4byte_mode()
127 struct fiu_reg *const inst = HAL_INSTANCE(dev); in qspi_npcx_config_dra_mode()
273 struct fiu_reg *const inst = HAL_INSTANCE(dev); in qspi_npcx_fiu_init()
/Zephyr-latest/soc/nuvoton/npcx/common/
Dregisters.c166 NPCX_REG_SIZE_CHECK(fiu_reg, 0x040);
168 NPCX_REG_SIZE_CHECK(fiu_reg, 0x034);
170 NPCX_REG_OFFSET_CHECK(fiu_reg, BURST_CFG, 0x001);
171 NPCX_REG_OFFSET_CHECK(fiu_reg, SPI_FL_CFG, 0x014);
172 NPCX_REG_OFFSET_CHECK(fiu_reg, UMA_CTS, 0x01e);
173 NPCX_REG_OFFSET_CHECK(fiu_reg, CRCCON, 0x026);
174 NPCX_REG_OFFSET_CHECK(fiu_reg, FIU_RD_CMD, 0x030);
175 NPCX_REG_OFFSET_CHECK(fiu_reg, FIU_EXT_CFG, 0x033);
/Zephyr-latest/soc/nuvoton/npcx/common/reg/
Dreg_def.h1462 struct fiu_reg { struct